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Diffstat (limited to 'llvm/test/CodeGen/X86/build-vector-256.ll')
-rw-r--r--llvm/test/CodeGen/X86/build-vector-256.ll36
1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/X86/build-vector-256.ll b/llvm/test/CodeGen/X86/build-vector-256.ll
index 4b077cc2469..f2f17710033 100644
--- a/llvm/test/CodeGen/X86/build-vector-256.ll
+++ b/llvm/test/CodeGen/X86/build-vector-256.ll
@@ -6,12 +6,12 @@
define <4 x double> @test_buildvector_v4f64(double %a0, double %a1, double %a2, double %a3) {
; AVX-32-LABEL: test_buildvector_v4f64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v4f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
@@ -25,12 +25,12 @@ define <4 x double> @test_buildvector_v4f64(double %a0, double %a1, double %a2,
define <8 x float> @test_buildvector_v8f32(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) {
; AVX-32-LABEL: test_buildvector_v8f32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v8f32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0]
@@ -52,12 +52,12 @@ define <8 x float> @test_buildvector_v8f32(float %a0, float %a1, float %a2, floa
define <4 x i64> @test_buildvector_v4i64(i64 %a0, i64 %a1, i64 %a2, i64 %a3) {
; AVX-32-LABEL: test_buildvector_v4i64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v4i64:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovq %rcx, %xmm0
; AVX1-64-NEXT: vmovq %rdx, %xmm1
; AVX1-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -68,7 +68,7 @@ define <4 x i64> @test_buildvector_v4i64(i64 %a0, i64 %a1, i64 %a2, i64 %a3) {
; AVX1-64-NEXT: retq
;
; AVX2-64-LABEL: test_buildvector_v4i64:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovq %rcx, %xmm0
; AVX2-64-NEXT: vmovq %rdx, %xmm1
; AVX2-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -86,12 +86,12 @@ define <4 x i64> @test_buildvector_v4i64(i64 %a0, i64 %a1, i64 %a2, i64 %a3) {
define <8 x i32> @test_buildvector_v8i32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) {
; AVX-32-LABEL: test_buildvector_v8i32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v8i32:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -104,7 +104,7 @@ define <8 x i32> @test_buildvector_v8i32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32
; AVX1-64-NEXT: retq
;
; AVX2-64-LABEL: test_buildvector_v8i32:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -128,7 +128,7 @@ define <8 x i32> @test_buildvector_v8i32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32
define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) {
; AVX1-32-LABEL: test_buildvector_v16i16:
-; AVX1-32: # BB#0:
+; AVX1-32: # %bb.0:
; AVX1-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX1-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX1-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -149,7 +149,7 @@ define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i
; AVX1-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v16i16:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrw $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrw $2, %edx, %xmm0, %xmm0
@@ -170,7 +170,7 @@ define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i
; AVX1-64-NEXT: retq
;
; AVX2-32-LABEL: test_buildvector_v16i16:
-; AVX2-32: # BB#0:
+; AVX2-32: # %bb.0:
; AVX2-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX2-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX2-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -191,7 +191,7 @@ define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i
; AVX2-32-NEXT: retl
;
; AVX2-64-LABEL: test_buildvector_v16i16:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrw $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrw $2, %edx, %xmm0, %xmm0
@@ -231,7 +231,7 @@ define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i
define <32 x i8> @test_buildvector_v32i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) {
; AVX1-32-LABEL: test_buildvector_v32i8:
-; AVX1-32: # BB#0:
+; AVX1-32: # %bb.0:
; AVX1-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX1-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX1-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -268,7 +268,7 @@ define <32 x i8> @test_buildvector_v32i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4,
; AVX1-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v32i8:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
@@ -305,7 +305,7 @@ define <32 x i8> @test_buildvector_v32i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4,
; AVX1-64-NEXT: retq
;
; AVX2-32-LABEL: test_buildvector_v32i8:
-; AVX2-32: # BB#0:
+; AVX2-32: # %bb.0:
; AVX2-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX2-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX2-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -342,7 +342,7 @@ define <32 x i8> @test_buildvector_v32i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4,
; AVX2-32-NEXT: retl
;
; AVX2-64-LABEL: test_buildvector_v32i8:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
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