diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/MergeConsecutiveStores.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/MergeConsecutiveStores.ll | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll index ce1779bf04c..b50253bf2b0 100644 --- a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -1,6 +1,6 @@ ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s -; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s %struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 } %struct.B = type { i32, i32, i32, i32, i32, i32, i32, i32 } @@ -185,7 +185,8 @@ define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struc ; BWON: movzbl ; BWOFF: movb ; CHECK: movb -; CHECK: movb +; BWON: movzbl +; BWOFF: movb ; CHECK: movb ; CHECK: ret define void @no_merge_loads(i32 %count, %struct.A* noalias nocapture %q, %struct.A* noalias nocapture %p) nounwind uwtable noinline ssp { @@ -340,8 +341,9 @@ block4: ; preds = %4, %.lr.ph ; Make sure that we merge the consecutive load/store sequence below and use a ; word (16 bit) instead of a byte copy. ; CHECK-LABEL: MergeLoadStoreBaseIndexOffset: -; CHECK: movw (%{{.*}},%{{.*}}), [[REG:%[a-z]+]] -; CHECK: movw [[REG]], (%{{.*}}) +; BWON: movzwl (%{{.*}},%{{.*}}), %e[[REG:[a-z]+]] +; BWOFF: movw (%{{.*}},%{{.*}}), %[[REG:[a-z]+]] +; CHECK: movw %[[REG]], (%{{.*}}) define void @MergeLoadStoreBaseIndexOffset(i64* %a, i8* %b, i8* %c, i32 %n) { br label %1 @@ -372,8 +374,9 @@ define void @MergeLoadStoreBaseIndexOffset(i64* %a, i8* %b, i8* %c, i32 %n) { ; word (16 bit) instead of a byte copy even if there are intermediate sign ; extensions. ; CHECK-LABEL: MergeLoadStoreBaseIndexOffsetSext: -; CHECK: movw (%{{.*}},%{{.*}}), [[REG:%[a-z]+]] -; CHECK: movw [[REG]], (%{{.*}}) +; BWON: movzwl (%{{.*}},%{{.*}}), %e[[REG:[a-z]+]] +; BWOFF: movw (%{{.*}},%{{.*}}), %[[REG:[a-z]+]] +; CHECK: movw %[[REG]], (%{{.*}}) define void @MergeLoadStoreBaseIndexOffsetSext(i8* %a, i8* %b, i8* %c, i32 %n) { br label %1 |
