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-rw-r--r--llvm/test/CodeGen/X86/3addr-or.ll10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/3addr-or.ll b/llvm/test/CodeGen/X86/3addr-or.ll
index 8a274e509d1..7c78026f55d 100644
--- a/llvm/test/CodeGen/X86/3addr-or.ll
+++ b/llvm/test/CodeGen/X86/3addr-or.ll
@@ -17,16 +17,18 @@ define i32 @test1(i32 %x) nounwind ssp {
; This test no longer requires or to be converted to 3 addr form because we are
; are able to use a zero extend instead of an 'and' which gives the register
; allocator freedom.
+
+; FIXME: anyextends into a constant and mask should be folded.
define i64 @test2(i8 %A, i8 %B) nounwind {
; CHECK-LABEL: test2:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
-; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
-; CHECK-NEXT: shll $4, %edi
-; CHECK-NEXT: andl $48, %edi
+; CHECK-NEXT: shlb $4, %dil
+; CHECK-NEXT: movzbl %dil, %ecx
+; CHECK-NEXT: andl $48, %ecx
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: shrq $4, %rax
-; CHECK-NEXT: orq %rdi, %rax
+; CHECK-NEXT: orq %rcx, %rax
; CHECK-NEXT: retq
%C = zext i8 %A to i64
%D = shl i64 %C, 4
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