summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll')
-rw-r--r--llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll1128
1 files changed, 109 insertions, 1019 deletions
diff --git a/llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll b/llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
index f7d6a3f3799..af619354cec 100644
--- a/llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
@@ -1,78 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
-; RUN: llc -mtriple=thumbebv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
+; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -enable-arm-maskedldst -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
+; RUN: llc -mtriple=thumbebv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -enable-arm-maskedldst -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
define void @foo_v4i32_v4i32(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
; CHECK-LABEL: foo_v4i32_v4i32:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
; CHECK-NEXT: vldrw.u32 q0, [r1]
-; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #3, #1
-; CHECK-NEXT: and r1, r3, #15
-; CHECK-NEXT: lsls r3, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrne r3, [r2]
-; CHECK-NEXT: vmovne.32 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.32 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.32 q0[2], r3
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r1, [r2, #12]
-; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne r2, s0
-; CHECK-NEXT: strne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s1
-; CHECK-NEXT: strmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s2
-; CHECK-NEXT: strmi r2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r1, s3
-; CHECK-NEXT: strmi r1, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrwt.u32 q0, [r2]
+; CHECK-NEXT: vstrwt.32 q0, [r0]
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -85,8 +22,8 @@ entry:
define void @foo_sext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%src) {
; CHECK-LABEL: foo_sext_v4i32_v4i8:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
@@ -121,40 +58,11 @@ define void @foo_sext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrbmi r1, [r2, #3]
; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: vmovlb.s8 q0, q0
; CHECK-NEXT: vmovlb.s16 q0, q0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne r2, s0
-; CHECK-NEXT: strne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s1
-; CHECK-NEXT: strmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s2
-; CHECK-NEXT: strmi r2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r1, s3
-; CHECK-NEXT: strmi r1, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -168,8 +76,8 @@ entry:
define void @foo_sext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16> *%src) {
; CHECK-LABEL: foo_sext_v4i32_v4i16:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
@@ -204,39 +112,10 @@ define void @foo_sext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16>
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrhmi r1, [r2, #6]
; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: vmovlb.s16 q0, q0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne r2, s0
-; CHECK-NEXT: strne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s1
-; CHECK-NEXT: strmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s2
-; CHECK-NEXT: strmi r2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r1, s3
-; CHECK-NEXT: strmi r1, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -250,8 +129,8 @@ entry:
define void @foo_zext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%src) {
; CHECK-LABEL: foo_zext_v4i32_v4i8:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vmov.i32 q1, #0xff
@@ -287,39 +166,10 @@ define void @foo_zext_v4i32_v4i8(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i8> *%
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrbmi r1, [r2, #3]
; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: vand q0, q0, q1
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne r2, s0
-; CHECK-NEXT: strne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s1
-; CHECK-NEXT: strmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s2
-; CHECK-NEXT: strmi r2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r1, s3
-; CHECK-NEXT: strmi r1, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -333,8 +183,8 @@ entry:
define void @foo_zext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16> *%src) {
; CHECK-LABEL: foo_zext_v4i32_v4i16:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
@@ -369,39 +219,10 @@ define void @foo_zext_v4i32_v4i16(<4 x i32> *%dest, <4 x i32> *%mask, <4 x i16>
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrhmi r1, [r2, #6]
; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: vmovlb.u16 q0, q0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne r2, s0
-; CHECK-NEXT: strne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s1
-; CHECK-NEXT: strmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r2, s2
-; CHECK-NEXT: strmi r2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi r1, s3
-; CHECK-NEXT: strmi r1, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrwt.32 q0, [r0]
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -415,130 +236,11 @@ entry:
define void @foo_v8i16_v8i16(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i16> *%src) {
; CHECK-LABEL: foo_v8i16_v8i16:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #16
-; CHECK-NEXT: sub sp, #16
; CHECK-NEXT: vldrh.u16 q0, [r1]
-; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s16 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #2, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #3, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #4, #1
-; CHECK-NEXT: ubfx r1, r12, #10, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #5, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #6, #1
-; CHECK-NEXT: ubfx r1, r12, #14, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r3
-; CHECK-NEXT: lsls r3, r3, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrhne r3, [r2]
-; CHECK-NEXT: vmovne.16 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #2]
-; CHECK-NEXT: vmovmi.16 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.16 q0[2], r3
-; CHECK-NEXT: lsls r3, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #6]
-; CHECK-NEXT: vmovmi.16 q0[3], r3
-; CHECK-NEXT: lsls r3, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.16 q0[4], r3
-; CHECK-NEXT: lsls r3, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #10]
-; CHECK-NEXT: vmovmi.16 q0[5], r3
-; CHECK-NEXT: lsls r3, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #12]
-; CHECK-NEXT: vmovmi.16 q0[6], r3
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r1, [r2, #14]
-; CHECK-NEXT: vmovmi.16 q0[7], r1
-; CHECK-NEXT: movs r2, #0
-; CHECK-NEXT: vmrs r1, p0
-; CHECK-NEXT: and r3, r1, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r1, #2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r1, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #2, #1
-; CHECK-NEXT: ubfx r3, r1, #6, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #3, #1
-; CHECK-NEXT: ubfx r3, r1, #8, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #4, #1
-; CHECK-NEXT: ubfx r3, r1, #10, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #5, #1
-; CHECK-NEXT: ubfx r3, r1, #12, #1
-; CHECK-NEXT: ubfx r1, r1, #14, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r2, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne.u16 r2, q0[0]
-; CHECK-NEXT: strhne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[1]
-; CHECK-NEXT: strhmi r2, [r0, #2]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[2]
-; CHECK-NEXT: strhmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[3]
-; CHECK-NEXT: strhmi r2, [r0, #6]
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[4]
-; CHECK-NEXT: strhmi r2, [r0, #8]
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[5]
-; CHECK-NEXT: strhmi r2, [r0, #10]
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[6]
-; CHECK-NEXT: strhmi r2, [r0, #12]
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r1, q0[7]
-; CHECK-NEXT: strhmi r1, [r0, #14]
-; CHECK-NEXT: add sp, #16
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrht.u16 q0, [r2]
+; CHECK-NEXT: vstrht.16 q0, [r0]
; CHECK-NEXT: bx lr
entry:
%0 = load <8 x i16>, <8 x i16>* %mask, align 2
@@ -551,8 +253,8 @@ entry:
define void @foo_sext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%src) {
; CHECK-LABEL: foo_sext_v8i16_v8i8:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #16
-; CHECK-NEXT: sub sp, #16
+; CHECK-NEXT: .pad #8
+; CHECK-NEXT: sub sp, #8
; CHECK-NEXT: vldrh.u16 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s16 gt, q0, zr
@@ -615,67 +317,10 @@ define void @foo_sext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrbmi r1, [r2, #7]
; CHECK-NEXT: vmovmi.16 q0[7], r1
-; CHECK-NEXT: movs r2, #0
-; CHECK-NEXT: vmrs r1, p0
; CHECK-NEXT: vmovlb.s8 q0, q0
-; CHECK-NEXT: and r3, r1, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r1, #2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r1, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #2, #1
-; CHECK-NEXT: ubfx r3, r1, #6, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #3, #1
-; CHECK-NEXT: ubfx r3, r1, #8, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #4, #1
-; CHECK-NEXT: ubfx r3, r1, #10, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #5, #1
-; CHECK-NEXT: ubfx r3, r1, #12, #1
-; CHECK-NEXT: ubfx r1, r1, #14, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r2, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne.u16 r2, q0[0]
-; CHECK-NEXT: strhne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[1]
-; CHECK-NEXT: strhmi r2, [r0, #2]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[2]
-; CHECK-NEXT: strhmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[3]
-; CHECK-NEXT: strhmi r2, [r0, #6]
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[4]
-; CHECK-NEXT: strhmi r2, [r0, #8]
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[5]
-; CHECK-NEXT: strhmi r2, [r0, #10]
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[6]
-; CHECK-NEXT: strhmi r2, [r0, #12]
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r1, q0[7]
-; CHECK-NEXT: strhmi r1, [r0, #14]
-; CHECK-NEXT: add sp, #16
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrht.16 q0, [r0]
+; CHECK-NEXT: add sp, #8
; CHECK-NEXT: bx lr
entry:
%0 = load <8 x i16>, <8 x i16>* %mask, align 2
@@ -689,8 +334,8 @@ entry:
define void @foo_zext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%src) {
; CHECK-LABEL: foo_zext_v8i16_v8i8:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #16
-; CHECK-NEXT: sub sp, #16
+; CHECK-NEXT: .pad #8
+; CHECK-NEXT: sub sp, #8
; CHECK-NEXT: vldrh.u16 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s16 gt, q0, zr
@@ -753,67 +398,10 @@ define void @foo_zext_v8i16_v8i8(<8 x i16> *%dest, <8 x i16> *%mask, <8 x i8> *%
; CHECK-NEXT: itt mi
; CHECK-NEXT: ldrbmi r1, [r2, #7]
; CHECK-NEXT: vmovmi.16 q0[7], r1
-; CHECK-NEXT: movs r2, #0
-; CHECK-NEXT: vmrs r1, p0
; CHECK-NEXT: vmovlb.u8 q0, q0
-; CHECK-NEXT: and r3, r1, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r1, #2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r1, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #2, #1
-; CHECK-NEXT: ubfx r3, r1, #6, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #3, #1
-; CHECK-NEXT: ubfx r3, r1, #8, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #4, #1
-; CHECK-NEXT: ubfx r3, r1, #10, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #5, #1
-; CHECK-NEXT: ubfx r3, r1, #12, #1
-; CHECK-NEXT: ubfx r1, r1, #14, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r2, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne.u16 r2, q0[0]
-; CHECK-NEXT: strhne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[1]
-; CHECK-NEXT: strhmi r2, [r0, #2]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[2]
-; CHECK-NEXT: strhmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[3]
-; CHECK-NEXT: strhmi r2, [r0, #6]
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[4]
-; CHECK-NEXT: strhmi r2, [r0, #8]
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[5]
-; CHECK-NEXT: strhmi r2, [r0, #10]
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r2, q0[6]
-; CHECK-NEXT: strhmi r2, [r0, #12]
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u16 r1, q0[7]
-; CHECK-NEXT: strhmi r1, [r0, #14]
-; CHECK-NEXT: add sp, #16
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vstrht.16 q0, [r0]
+; CHECK-NEXT: add sp, #8
; CHECK-NEXT: bx lr
entry:
%0 = load <8 x i16>, <8 x i16>* %mask, align 2
@@ -827,153 +415,12 @@ entry:
define void @foo_v16i8_v16i8(<16 x i8> *%dest, <16 x i8> *%mask, <16 x i8> *%src) {
; CHECK-LABEL: foo_v16i8_v16i8:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .save {r4, r6, r7, lr}
-; CHECK-NEXT: push {r4, r6, r7, lr}
-; CHECK-NEXT: .setfp r7, sp, #8
-; CHECK-NEXT: add r7, sp, #8
-; CHECK-NEXT: .pad #32
-; CHECK-NEXT: sub sp, #32
-; CHECK-NEXT: mov r4, sp
-; CHECK-NEXT: bfc r4, #0, #4
-; CHECK-NEXT: mov sp, r4
; CHECK-NEXT: vldrb.u8 q0, [r1]
-; CHECK-NEXT: sub.w r4, r7, #8
; CHECK-NEXT: vcmp.s8 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r3, p0
-; CHECK-NEXT: uxth r1, r3
-; CHECK-NEXT: lsls r3, r3, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrbne r3, [r2]
-; CHECK-NEXT: vmovne.8 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #1]
-; CHECK-NEXT: vmovmi.8 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #2]
-; CHECK-NEXT: vmovmi.8 q0[2], r3
-; CHECK-NEXT: lsls r3, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #3]
-; CHECK-NEXT: vmovmi.8 q0[3], r3
-; CHECK-NEXT: lsls r3, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.8 q0[4], r3
-; CHECK-NEXT: lsls r3, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #5]
-; CHECK-NEXT: vmovmi.8 q0[5], r3
-; CHECK-NEXT: lsls r3, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #6]
-; CHECK-NEXT: vmovmi.8 q0[6], r3
-; CHECK-NEXT: lsls r3, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #7]
-; CHECK-NEXT: vmovmi.8 q0[7], r3
-; CHECK-NEXT: lsls r3, r1, #23
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.8 q0[8], r3
-; CHECK-NEXT: lsls r3, r1, #22
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #9]
-; CHECK-NEXT: vmovmi.8 q0[9], r3
-; CHECK-NEXT: lsls r3, r1, #21
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #10]
-; CHECK-NEXT: vmovmi.8 q0[10], r3
-; CHECK-NEXT: lsls r3, r1, #20
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #11]
-; CHECK-NEXT: vmovmi.8 q0[11], r3
-; CHECK-NEXT: lsls r3, r1, #19
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #12]
-; CHECK-NEXT: vmovmi.8 q0[12], r3
-; CHECK-NEXT: lsls r3, r1, #18
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #13]
-; CHECK-NEXT: vmovmi.8 q0[13], r3
-; CHECK-NEXT: lsls r3, r1, #17
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r3, [r2, #14]
-; CHECK-NEXT: vmovmi.8 q0[14], r3
-; CHECK-NEXT: lsls r1, r1, #16
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrbmi r1, [r2, #15]
-; CHECK-NEXT: vmovmi.8 q0[15], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: uxth r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: vmovne.u8 r2, q0[0]
-; CHECK-NEXT: strbne r2, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[1]
-; CHECK-NEXT: strbmi r2, [r0, #1]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[2]
-; CHECK-NEXT: strbmi r2, [r0, #2]
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[3]
-; CHECK-NEXT: strbmi r2, [r0, #3]
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[4]
-; CHECK-NEXT: strbmi r2, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[5]
-; CHECK-NEXT: strbmi r2, [r0, #5]
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[6]
-; CHECK-NEXT: strbmi r2, [r0, #6]
-; CHECK-NEXT: lsls r2, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[7]
-; CHECK-NEXT: strbmi r2, [r0, #7]
-; CHECK-NEXT: lsls r2, r1, #23
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[8]
-; CHECK-NEXT: strbmi r2, [r0, #8]
-; CHECK-NEXT: lsls r2, r1, #22
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[9]
-; CHECK-NEXT: strbmi r2, [r0, #9]
-; CHECK-NEXT: lsls r2, r1, #21
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[10]
-; CHECK-NEXT: strbmi r2, [r0, #10]
-; CHECK-NEXT: lsls r2, r1, #20
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[11]
-; CHECK-NEXT: strbmi r2, [r0, #11]
-; CHECK-NEXT: lsls r2, r1, #19
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[12]
-; CHECK-NEXT: strbmi r2, [r0, #12]
-; CHECK-NEXT: lsls r2, r1, #18
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[13]
-; CHECK-NEXT: strbmi r2, [r0, #13]
-; CHECK-NEXT: lsls r2, r1, #17
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r2, q0[14]
-; CHECK-NEXT: strbmi r2, [r0, #14]
-; CHECK-NEXT: lsls r1, r1, #16
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: vmovmi.u8 r1, q0[15]
-; CHECK-NEXT: strbmi r1, [r0, #15]
-; CHECK-NEXT: mov sp, r4
-; CHECK-NEXT: pop {r4, r6, r7, pc}
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrbt.u8 q0, [r2]
+; CHECK-NEXT: vstrbt.8 q0, [r0]
+; CHECK-NEXT: bx lr
entry:
%0 = load <16 x i8>, <16 x i8>* %mask, align 1
%1 = icmp sgt <16 x i8> %0, zeroinitializer
@@ -985,98 +432,40 @@ entry:
define void @foo_trunc_v8i8_v8i16(<8 x i8> *%dest, <8 x i16> *%mask, <8 x i16> *%src) {
; CHECK-LABEL: foo_trunc_v8i8_v8i16:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #16
-; CHECK-NEXT: sub sp, #16
+; CHECK-NEXT: .pad #8
+; CHECK-NEXT: sub sp, #8
; CHECK-NEXT: vldrh.u16 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s16 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #2, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #3, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #4, #1
-; CHECK-NEXT: ubfx r1, r12, #10, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #5, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #6, #1
-; CHECK-NEXT: ubfx r1, r12, #14, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r3
-; CHECK-NEXT: lsls r3, r3, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrhne r3, [r2]
-; CHECK-NEXT: vmovne.16 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #2]
-; CHECK-NEXT: vmovmi.16 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.16 q0[2], r3
-; CHECK-NEXT: lsls r3, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #6]
-; CHECK-NEXT: vmovmi.16 q0[3], r3
-; CHECK-NEXT: lsls r3, r1, #27
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.16 q0[4], r3
-; CHECK-NEXT: lsls r3, r1, #26
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #10]
-; CHECK-NEXT: vmovmi.16 q0[5], r3
-; CHECK-NEXT: lsls r3, r1, #25
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r3, [r2, #12]
-; CHECK-NEXT: vmovmi.16 q0[6], r3
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrhmi r1, [r2, #14]
-; CHECK-NEXT: vmovmi.16 q0[7], r1
-; CHECK-NEXT: movs r2, #0
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrht.u16 q0, [r2]
; CHECK-NEXT: vmrs r1, p0
-; CHECK-NEXT: and r3, r1, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r1, #2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r1, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #2, #1
-; CHECK-NEXT: ubfx r3, r1, #6, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #3, #1
-; CHECK-NEXT: ubfx r3, r1, #8, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #4, #1
-; CHECK-NEXT: ubfx r3, r1, #10, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #5, #1
-; CHECK-NEXT: ubfx r3, r1, #12, #1
+; CHECK-NEXT: and r2, r1, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #0, #1
+; CHECK-NEXT: ubfx r2, r1, #2, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #1, #1
+; CHECK-NEXT: ubfx r2, r1, #4, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #2, #1
+; CHECK-NEXT: ubfx r2, r1, #6, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #3, #1
+; CHECK-NEXT: ubfx r2, r1, #8, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #4, #1
+; CHECK-NEXT: ubfx r2, r1, #10, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #5, #1
+; CHECK-NEXT: ubfx r2, r1, #12, #1
; CHECK-NEXT: ubfx r1, r1, #14, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #6, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #6, #1
; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r2, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
+; CHECK-NEXT: bfi r3, r1, #7, #1
+; CHECK-NEXT: lsls r2, r3, #31
+; CHECK-NEXT: uxtb r1, r3
; CHECK-NEXT: itt ne
; CHECK-NEXT: vmovne.u16 r2, q0[0]
; CHECK-NEXT: strbne r2, [r0]
@@ -1108,7 +497,7 @@ define void @foo_trunc_v8i8_v8i16(<8 x i8> *%dest, <8 x i16> *%mask, <8 x i16> *
; CHECK-NEXT: itt mi
; CHECK-NEXT: vmovmi.u16 r1, q0[7]
; CHECK-NEXT: strbmi r1, [r0, #7]
-; CHECK-NEXT: add sp, #16
+; CHECK-NEXT: add sp, #8
; CHECK-NEXT: bx lr
entry:
%0 = load <8 x i16>, <8 x i16>* %mask, align 2
@@ -1122,57 +511,27 @@ entry:
define void @foo_trunc_v4i8_v4i32(<4 x i8> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
; CHECK-LABEL: foo_trunc_v4i8_v4i32:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r2]
+; CHECK-NEXT: vmrs r1, p0
+; CHECK-NEXT: and r2, r1, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #0, #1
+; CHECK-NEXT: ubfx r2, r1, #4, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #1, #1
+; CHECK-NEXT: ubfx r2, r1, #8, #1
+; CHECK-NEXT: ubfx r1, r1, #12, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #2, #1
; CHECK-NEXT: rsbs r1, r1, #0
; CHECK-NEXT: bfi r3, r1, #3, #1
; CHECK-NEXT: and r1, r3, #15
-; CHECK-NEXT: lsls r3, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrne r3, [r2]
-; CHECK-NEXT: vmovne.32 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.32 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.32 q0[2], r3
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r1, [r2, #12]
-; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
; CHECK-NEXT: lsls r2, r1, #31
; CHECK-NEXT: itt ne
; CHECK-NEXT: vmovne r2, s0
@@ -1189,7 +548,7 @@ define void @foo_trunc_v4i8_v4i32(<4 x i8> *%dest, <4 x i32> *%mask, <4 x i32> *
; CHECK-NEXT: itt mi
; CHECK-NEXT: vmovmi r1, s3
; CHECK-NEXT: strbmi r1, [r0, #3]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -1203,57 +562,27 @@ entry:
define void @foo_trunc_v4i16_v4i32(<4 x i16> *%dest, <4 x i32> *%mask, <4 x i32> *%src) {
; CHECK-LABEL: foo_trunc_v4i16_v4i32:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
+; CHECK-NEXT: .pad #4
+; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: vldrw.u32 q0, [r1]
; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
+; CHECK-NEXT: vpst
+; CHECK-NEXT: vldrwt.u32 q0, [r2]
+; CHECK-NEXT: vmrs r1, p0
+; CHECK-NEXT: and r2, r1, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #0, #1
+; CHECK-NEXT: ubfx r2, r1, #4, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #1, #1
+; CHECK-NEXT: ubfx r2, r1, #8, #1
+; CHECK-NEXT: ubfx r1, r1, #12, #1
+; CHECK-NEXT: rsbs r2, r2, #0
+; CHECK-NEXT: bfi r3, r2, #2, #1
; CHECK-NEXT: rsbs r1, r1, #0
; CHECK-NEXT: bfi r3, r1, #3, #1
; CHECK-NEXT: and r1, r3, #15
-; CHECK-NEXT: lsls r3, r1, #31
-; CHECK-NEXT: itt ne
-; CHECK-NEXT: ldrne r3, [r2]
-; CHECK-NEXT: vmovne.32 q0[0], r3
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #4]
-; CHECK-NEXT: vmovmi.32 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r3, [r2, #8]
-; CHECK-NEXT: vmovmi.32 q0[2], r3
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: itt mi
-; CHECK-NEXT: ldrmi r1, [r2, #12]
-; CHECK-NEXT: vmovmi.32 q0[3], r1
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
; CHECK-NEXT: lsls r2, r1, #31
; CHECK-NEXT: itt ne
; CHECK-NEXT: vmovne r2, s0
@@ -1270,7 +599,7 @@ define void @foo_trunc_v4i16_v4i32(<4 x i16> *%dest, <4 x i32> *%mask, <4 x i32>
; CHECK-NEXT: itt mi
; CHECK-NEXT: vmovmi r1, s3
; CHECK-NEXT: strhmi r1, [r0, #6]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: add sp, #4
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -1284,66 +613,11 @@ entry:
define void @foo_v4f32_v4f32(<4 x float> *%dest, <4 x i32> *%mask, <4 x float> *%src) {
; CHECK-LABEL: foo_v4f32_v4f32:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #8
-; CHECK-NEXT: sub sp, #8
; CHECK-NEXT: vldrw.u32 q0, [r1]
-; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s32 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #3, #1
-; CHECK-NEXT: and r1, r3, #15
-; CHECK-NEXT: lsls r3, r1, #31
-; CHECK-NEXT: it ne
-; CHECK-NEXT: vldrne s0, [r2]
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vldrmi s1, [r2, #4]
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vldrmi s2, [r2, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vldrmi s3, [r2, #12]
-; CHECK-NEXT: vmrs r2, p0
-; CHECK-NEXT: movs r1, #0
-; CHECK-NEXT: and r3, r2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r2, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r2, #8, #1
-; CHECK-NEXT: ubfx r2, r2, #12, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r1, r3, #2, #1
-; CHECK-NEXT: rsbs r2, r2, #0
-; CHECK-NEXT: bfi r1, r2, #3, #1
-; CHECK-NEXT: and r1, r1, #15
-; CHECK-NEXT: lsls r2, r1, #31
-; CHECK-NEXT: it ne
-; CHECK-NEXT: vstrne s0, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vstrmi s1, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vstrmi s2, [r0, #8]
-; CHECK-NEXT: lsls r1, r1, #28
-; CHECK-NEXT: it mi
-; CHECK-NEXT: vstrmi s3, [r0, #12]
-; CHECK-NEXT: add sp, #8
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrwt.u32 q0, [r2]
+; CHECK-NEXT: vstrwt.32 q0, [r0]
; CHECK-NEXT: bx lr
entry:
%0 = load <4 x i32>, <4 x i32>* %mask, align 4
@@ -1356,195 +630,11 @@ entry:
define void @foo_v8f16_v8f16(<8 x half> *%dest, <8 x i16> *%mask, <8 x half> *%src) {
; CHECK-LABEL: foo_v8f16_v8f16:
; CHECK: @ %bb.0: @ %entry
-; CHECK-NEXT: .pad #16
-; CHECK-NEXT: sub sp, #16
; CHECK-NEXT: vldrh.u16 q0, [r1]
-; CHECK-NEXT: movs r3, #0
; CHECK-NEXT: vcmp.s16 gt, q0, zr
-; CHECK-NEXT: @ implicit-def: $q0
-; CHECK-NEXT: vmrs r12, p0
-; CHECK-NEXT: and r1, r12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #0, #1
-; CHECK-NEXT: ubfx r1, r12, #2, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #1, #1
-; CHECK-NEXT: ubfx r1, r12, #4, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #2, #1
-; CHECK-NEXT: ubfx r1, r12, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #3, #1
-; CHECK-NEXT: ubfx r1, r12, #8, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #4, #1
-; CHECK-NEXT: ubfx r1, r12, #10, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #5, #1
-; CHECK-NEXT: ubfx r1, r12, #12, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #6, #1
-; CHECK-NEXT: ubfx r1, r12, #14, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r3, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r3
-; CHECK-NEXT: lsls r3, r3, #31
-; CHECK-NEXT: bne .LBB13_18
-; CHECK-NEXT: @ %bb.1: @ %else
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: bmi .LBB13_19
-; CHECK-NEXT: .LBB13_2: @ %else2
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: bmi .LBB13_20
-; CHECK-NEXT: .LBB13_3: @ %else5
-; CHECK-NEXT: lsls r3, r1, #28
-; CHECK-NEXT: bmi .LBB13_21
-; CHECK-NEXT: .LBB13_4: @ %else8
-; CHECK-NEXT: lsls r3, r1, #27
-; CHECK-NEXT: bmi .LBB13_22
-; CHECK-NEXT: .LBB13_5: @ %else11
-; CHECK-NEXT: lsls r3, r1, #26
-; CHECK-NEXT: bmi .LBB13_23
-; CHECK-NEXT: .LBB13_6: @ %else14
-; CHECK-NEXT: lsls r3, r1, #25
-; CHECK-NEXT: bmi .LBB13_24
-; CHECK-NEXT: .LBB13_7: @ %else17
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: bpl .LBB13_9
-; CHECK-NEXT: .LBB13_8: @ %cond.load19
-; CHECK-NEXT: vldr.16 s4, [r2, #14]
-; CHECK-NEXT: vmov r1, s4
-; CHECK-NEXT: vmov.16 q0[7], r1
-; CHECK-NEXT: .LBB13_9: @ %else20
-; CHECK-NEXT: vmrs r1, p0
-; CHECK-NEXT: movs r2, #0
-; CHECK-NEXT: and r3, r1, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #0, #1
-; CHECK-NEXT: ubfx r3, r1, #2, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #1, #1
-; CHECK-NEXT: ubfx r3, r1, #4, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #2, #1
-; CHECK-NEXT: ubfx r3, r1, #6, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #3, #1
-; CHECK-NEXT: ubfx r3, r1, #8, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #4, #1
-; CHECK-NEXT: ubfx r3, r1, #10, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #5, #1
-; CHECK-NEXT: ubfx r3, r1, #12, #1
-; CHECK-NEXT: ubfx r1, r1, #14, #1
-; CHECK-NEXT: rsbs r3, r3, #0
-; CHECK-NEXT: bfi r2, r3, #6, #1
-; CHECK-NEXT: rsbs r1, r1, #0
-; CHECK-NEXT: bfi r2, r1, #7, #1
-; CHECK-NEXT: uxtb r1, r2
-; CHECK-NEXT: lsls r2, r2, #31
-; CHECK-NEXT: bne .LBB13_25
-; CHECK-NEXT: @ %bb.10: @ %else23
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: bmi .LBB13_26
-; CHECK-NEXT: .LBB13_11: @ %else25
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: bmi .LBB13_27
-; CHECK-NEXT: .LBB13_12: @ %else27
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: bmi .LBB13_28
-; CHECK-NEXT: .LBB13_13: @ %else29
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: bmi .LBB13_29
-; CHECK-NEXT: .LBB13_14: @ %else31
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: bmi .LBB13_30
-; CHECK-NEXT: .LBB13_15: @ %else33
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: bmi .LBB13_31
-; CHECK-NEXT: .LBB13_16: @ %else35
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: bmi .LBB13_32
-; CHECK-NEXT: .LBB13_17: @ %else37
-; CHECK-NEXT: add sp, #16
-; CHECK-NEXT: bx lr
-; CHECK-NEXT: .LBB13_18: @ %cond.load
-; CHECK-NEXT: vldr.16 s0, [r2]
-; CHECK-NEXT: lsls r3, r1, #30
-; CHECK-NEXT: bpl .LBB13_2
-; CHECK-NEXT: .LBB13_19: @ %cond.load1
-; CHECK-NEXT: vldr.16 s4, [r2, #2]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[1], r3
-; CHECK-NEXT: lsls r3, r1, #29
-; CHECK-NEXT: bpl .LBB13_3
-; CHECK-NEXT: .LBB13_20: @ %cond.load4
-; CHECK-NEXT: vldr.16 s4, [r2, #4]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[2], r3
-; CHECK-NEXT: lsls r3, r1, #28
-; CHECK-NEXT: bpl .LBB13_4
-; CHECK-NEXT: .LBB13_21: @ %cond.load7
-; CHECK-NEXT: vldr.16 s4, [r2, #6]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[3], r3
-; CHECK-NEXT: lsls r3, r1, #27
-; CHECK-NEXT: bpl .LBB13_5
-; CHECK-NEXT: .LBB13_22: @ %cond.load10
-; CHECK-NEXT: vldr.16 s4, [r2, #8]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[4], r3
-; CHECK-NEXT: lsls r3, r1, #26
-; CHECK-NEXT: bpl .LBB13_6
-; CHECK-NEXT: .LBB13_23: @ %cond.load13
-; CHECK-NEXT: vldr.16 s4, [r2, #10]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[5], r3
-; CHECK-NEXT: lsls r3, r1, #25
-; CHECK-NEXT: bpl.w .LBB13_7
-; CHECK-NEXT: .LBB13_24: @ %cond.load16
-; CHECK-NEXT: vldr.16 s4, [r2, #12]
-; CHECK-NEXT: vmov r3, s4
-; CHECK-NEXT: vmov.16 q0[6], r3
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: bmi.w .LBB13_8
-; CHECK-NEXT: b .LBB13_9
-; CHECK-NEXT: .LBB13_25: @ %cond.store
-; CHECK-NEXT: vstr.16 s0, [r0]
-; CHECK-NEXT: lsls r2, r1, #30
-; CHECK-NEXT: bpl .LBB13_11
-; CHECK-NEXT: .LBB13_26: @ %cond.store24
-; CHECK-NEXT: vmovx.f16 s4, s0
-; CHECK-NEXT: vstr.16 s4, [r0, #2]
-; CHECK-NEXT: lsls r2, r1, #29
-; CHECK-NEXT: bpl .LBB13_12
-; CHECK-NEXT: .LBB13_27: @ %cond.store26
-; CHECK-NEXT: vstr.16 s1, [r0, #4]
-; CHECK-NEXT: lsls r2, r1, #28
-; CHECK-NEXT: bpl .LBB13_13
-; CHECK-NEXT: .LBB13_28: @ %cond.store28
-; CHECK-NEXT: vmovx.f16 s4, s1
-; CHECK-NEXT: vstr.16 s4, [r0, #6]
-; CHECK-NEXT: lsls r2, r1, #27
-; CHECK-NEXT: bpl .LBB13_14
-; CHECK-NEXT: .LBB13_29: @ %cond.store30
-; CHECK-NEXT: vstr.16 s2, [r0, #8]
-; CHECK-NEXT: lsls r2, r1, #26
-; CHECK-NEXT: bpl .LBB13_15
-; CHECK-NEXT: .LBB13_30: @ %cond.store32
-; CHECK-NEXT: vmovx.f16 s4, s2
-; CHECK-NEXT: vstr.16 s4, [r0, #10]
-; CHECK-NEXT: lsls r2, r1, #25
-; CHECK-NEXT: bpl .LBB13_16
-; CHECK-NEXT: .LBB13_31: @ %cond.store34
-; CHECK-NEXT: vstr.16 s3, [r0, #12]
-; CHECK-NEXT: lsls r1, r1, #24
-; CHECK-NEXT: bpl .LBB13_17
-; CHECK-NEXT: .LBB13_32: @ %cond.store36
-; CHECK-NEXT: vmovx.f16 s0, s3
-; CHECK-NEXT: vstr.16 s0, [r0, #14]
-; CHECK-NEXT: add sp, #16
+; CHECK-NEXT: vpstt
+; CHECK-NEXT: vldrht.u16 q0, [r2]
+; CHECK-NEXT: vstrht.16 q0, [r0]
; CHECK-NEXT: bx lr
entry:
%0 = load <8 x i16>, <8 x i16>* %mask, align 2
OpenPOWER on IntegriCloud