summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/SystemZ
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/SystemZ')
-rw-r--r--llvm/test/CodeGen/SystemZ/fp-conv-10.ll57
-rw-r--r--llvm/test/CodeGen/SystemZ/fp-conv-12.ll57
2 files changed, 84 insertions, 30 deletions
diff --git a/llvm/test/CodeGen/SystemZ/fp-conv-10.ll b/llvm/test/CodeGen/SystemZ/fp-conv-10.ll
index dc5178985d9..f897743ef11 100644
--- a/llvm/test/CodeGen/SystemZ/fp-conv-10.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-conv-10.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test conversion of floating-point values to unsigned i32s (z10 only).
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
@@ -10,11 +11,19 @@
; Test f32->i32.
define i32 @f1(float %f) {
; CHECK-LABEL: f1:
-; CHECK: cebr
-; CHECK: sebr
-; CHECK: cfebr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI0_0
+; CHECK-NEXT: le %f1, 0(%r1)
+; CHECK-NEXT: cebr %f0, %f1
+; CHECK-NEXT: jnl .LBB0_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfebr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB0_2:
+; CHECK-NEXT: sebr %f0, %f1
+; CHECK-NEXT: cfebr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui float %f to i32
ret i32 %conv
}
@@ -22,11 +31,19 @@ define i32 @f1(float %f) {
; Test f64->i32.
define i32 @f2(double %f) {
; CHECK-LABEL: f2:
-; CHECK: cdbr
-; CHECK: sdbr
-; CHECK: cfdbr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI1_0
+; CHECK-NEXT: ldeb %f1, 0(%r1)
+; CHECK-NEXT: cdbr %f0, %f1
+; CHECK-NEXT: jnl .LBB1_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfdbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB1_2:
+; CHECK-NEXT: sdbr %f0, %f1
+; CHECK-NEXT: cfdbr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui double %f to i32
ret i32 %conv
}
@@ -34,11 +51,21 @@ define i32 @f2(double %f) {
; Test f128->i32.
define i32 @f3(fp128 *%src) {
; CHECK-LABEL: f3:
-; CHECK: cxbr
-; CHECK: sxbr
-; CHECK: cfxbr
-; CHECK: xilf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld %f0, 0(%r2)
+; CHECK-NEXT: ld %f2, 8(%r2)
+; CHECK-NEXT: larl %r1, .LCPI2_0
+; CHECK-NEXT: lxeb %f1, 0(%r1)
+; CHECK-NEXT: cxbr %f0, %f1
+; CHECK-NEXT: jnl .LBB2_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cfxbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB2_2:
+; CHECK-NEXT: sxbr %f0, %f1
+; CHECK-NEXT: cfxbr %r2, 5, %f0
+; CHECK-NEXT: xilf %r2, 2147483648
+; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src
%conv = fptoui fp128 %f to i32
ret i32 %conv
diff --git a/llvm/test/CodeGen/SystemZ/fp-conv-12.ll b/llvm/test/CodeGen/SystemZ/fp-conv-12.ll
index d37a443c482..91c377fa3e2 100644
--- a/llvm/test/CodeGen/SystemZ/fp-conv-12.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-conv-12.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test conversion of floating-point values to unsigned i64s (z10 only).
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
@@ -9,11 +10,19 @@
; Test f32->i64.
define i64 @f1(float %f) {
; CHECK-LABEL: f1:
-; CHECK: cebr
-; CHECK: sebr
-; CHECK: cgebr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI0_0
+; CHECK-NEXT: le %f1, 0(%r1)
+; CHECK-NEXT: cebr %f0, %f1
+; CHECK-NEXT: jnl .LBB0_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgebr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB0_2:
+; CHECK-NEXT: sebr %f0, %f1
+; CHECK-NEXT: cgebr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui float %f to i64
ret i64 %conv
}
@@ -21,11 +30,19 @@ define i64 @f1(float %f) {
; Test f64->i64.
define i64 @f2(double %f) {
; CHECK-LABEL: f2:
-; CHECK: cdbr
-; CHECK: sdbr
-; CHECK: cgdbr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: larl %r1, .LCPI1_0
+; CHECK-NEXT: ldeb %f1, 0(%r1)
+; CHECK-NEXT: cdbr %f0, %f1
+; CHECK-NEXT: jnl .LBB1_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgdbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB1_2:
+; CHECK-NEXT: sdbr %f0, %f1
+; CHECK-NEXT: cgdbr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%conv = fptoui double %f to i64
ret i64 %conv
}
@@ -33,11 +50,21 @@ define i64 @f2(double %f) {
; Test f128->i64.
define i64 @f3(fp128 *%src) {
; CHECK-LABEL: f3:
-; CHECK: cxbr
-; CHECK: sxbr
-; CHECK: cgxbr
-; CHECK: xihf
-; CHECK: br %r14
+; CHECK: # %bb.0:
+; CHECK-NEXT: ld %f0, 0(%r2)
+; CHECK-NEXT: ld %f2, 8(%r2)
+; CHECK-NEXT: larl %r1, .LCPI2_0
+; CHECK-NEXT: lxeb %f1, 0(%r1)
+; CHECK-NEXT: cxbr %f0, %f1
+; CHECK-NEXT: jnl .LBB2_2
+; CHECK-NEXT: # %bb.1:
+; CHECK-NEXT: cgxbr %r2, 5, %f0
+; CHECK-NEXT: br %r14
+; CHECK-NEXT: .LBB2_2:
+; CHECK-NEXT: sxbr %f0, %f1
+; CHECK-NEXT: cgxbr %r2, 5, %f0
+; CHECK-NEXT: xihf %r2, 2147483648
+; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src
%conv = fptoui fp128 %f to i64
ret i64 %conv
OpenPOWER on IntegriCloud