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-rw-r--r--llvm/test/CodeGen/SystemZ/int-add-05.ll18
1 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-add-05.ll b/llvm/test/CodeGen/SystemZ/int-add-05.ll
index ee840ac6478..4f39a2d4dec 100644
--- a/llvm/test/CodeGen/SystemZ/int-add-05.ll
+++ b/llvm/test/CodeGen/SystemZ/int-add-05.ll
@@ -6,7 +6,7 @@ declare i64 @foo()
; Check AGR.
define i64 @f1(i64 %a, i64 %b) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: agr %r2, %r3
; CHECK: br %r14
%add = add i64 %a, %b
@@ -15,7 +15,7 @@ define i64 @f1(i64 %a, i64 %b) {
; Check AG with no displacement.
define i64 @f2(i64 %a, i64 *%src) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: ag %r2, 0(%r3)
; CHECK: br %r14
%b = load i64 *%src
@@ -25,7 +25,7 @@ define i64 @f2(i64 %a, i64 *%src) {
; Check the high end of the aligned AG range.
define i64 @f3(i64 %a, i64 *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: ag %r2, 524280(%r3)
; CHECK: br %r14
%ptr = getelementptr i64 *%src, i64 65535
@@ -37,7 +37,7 @@ define i64 @f3(i64 %a, i64 *%src) {
; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f4(i64 %a, i64 *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: agfi %r3, 524288
; CHECK: ag %r2, 0(%r3)
; CHECK: br %r14
@@ -49,7 +49,7 @@ define i64 @f4(i64 %a, i64 *%src) {
; Check the high end of the negative aligned AG range.
define i64 @f5(i64 %a, i64 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: ag %r2, -8(%r3)
; CHECK: br %r14
%ptr = getelementptr i64 *%src, i64 -1
@@ -60,7 +60,7 @@ define i64 @f5(i64 %a, i64 *%src) {
; Check the low end of the AG range.
define i64 @f6(i64 %a, i64 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
; CHECK: ag %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i64 *%src, i64 -65536
@@ -72,7 +72,7 @@ define i64 @f6(i64 %a, i64 *%src) {
; Check the next doubleword down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f7(i64 %a, i64 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
; CHECK: agfi %r3, -524296
; CHECK: ag %r2, 0(%r3)
; CHECK: br %r14
@@ -84,7 +84,7 @@ define i64 @f7(i64 %a, i64 *%src) {
; Check that AG allows an index.
define i64 @f8(i64 %a, i64 %src, i64 %index) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
; CHECK: ag %r2, 524280({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%add1 = add i64 %src, %index
@@ -97,7 +97,7 @@ define i64 @f8(i64 %a, i64 %src, i64 %index) {
; Check that additions of spilled values can use AG rather than AGR.
define i64 @f9(i64 *%ptr0) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
; CHECK: brasl %r14, foo@PLT
; CHECK: ag %r2, 160(%r15)
; CHECK: br %r14
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