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-rw-r--r--llvm/test/CodeGen/SystemZ/frame-14.ll44
1 files changed, 22 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll
index 29fab98604e..22a45eecf30 100644
--- a/llvm/test/CodeGen/SystemZ/frame-14.ll
+++ b/llvm/test/CodeGen/SystemZ/frame-14.ll
@@ -20,11 +20,11 @@
; emergency spill slots at 160(%r15), the amount that we need to allocate
; in order to put another object at offset 4088 is 4088 - 176 = 3912 bytes.
define void @f1() {
-; CHECK-NOFP: f1:
+; CHECK-NOFP-LABEL: f1:
; CHECK-NOFP: mvi 4095(%r15), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f1:
+; CHECK-FP-LABEL: f1:
; CHECK-FP: mvi 4095(%r11), 42
; CHECK-FP: br %r14
%region1 = alloca [3912 x i8], align 8
@@ -38,11 +38,11 @@ define void @f1() {
; Test the first offset that is out-of-range of the 12-bit form.
define void @f2() {
-; CHECK-NOFP: f2:
+; CHECK-NOFP-LABEL: f2:
; CHECK-NOFP: mviy 4096(%r15), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f2:
+; CHECK-FP-LABEL: f2:
; CHECK-FP: mviy 4096(%r11), 42
; CHECK-FP: br %r14
%region1 = alloca [3912 x i8], align 8
@@ -59,11 +59,11 @@ define void @f2() {
; The last in-range doubleword offset is 524280, so by the same reasoning
; as above, we need to allocate objects of 524280 - 176 = 524104 bytes.
define void @f3() {
-; CHECK-NOFP: f3:
+; CHECK-NOFP-LABEL: f3:
; CHECK-NOFP: mviy 524287(%r15), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f3:
+; CHECK-FP-LABEL: f3:
; CHECK-FP: mviy 524287(%r11), 42
; CHECK-FP: br %r14
%region1 = alloca [524104 x i8], align 8
@@ -79,13 +79,13 @@ define void @f3() {
; and the offset is also out of LAY's range, so expect a constant load
; followed by an addition.
define void @f4() {
-; CHECK-NOFP: f4:
+; CHECK-NOFP-LABEL: f4:
; CHECK-NOFP: llilh %r1, 8
; CHECK-NOFP: agr %r1, %r15
; CHECK-NOFP: mvi 0(%r1), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f4:
+; CHECK-FP-LABEL: f4:
; CHECK-FP: llilh %r1, 8
; CHECK-FP: agr %r1, %r11
; CHECK-FP: mvi 0(%r1), 42
@@ -102,13 +102,13 @@ define void @f4() {
; Add 4095 to the previous offset, to test the other end of the MVI range.
; The instruction will actually be STCY before frame lowering.
define void @f5() {
-; CHECK-NOFP: f5:
+; CHECK-NOFP-LABEL: f5:
; CHECK-NOFP: llilh %r1, 8
; CHECK-NOFP: agr %r1, %r15
; CHECK-NOFP: mvi 4095(%r1), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f5:
+; CHECK-FP-LABEL: f5:
; CHECK-FP: llilh %r1, 8
; CHECK-FP: agr %r1, %r11
; CHECK-FP: mvi 4095(%r1), 42
@@ -124,13 +124,13 @@ define void @f5() {
; Test the next offset after that, which uses MVIY instead of MVI.
define void @f6() {
-; CHECK-NOFP: f6:
+; CHECK-NOFP-LABEL: f6:
; CHECK-NOFP: llilh %r1, 8
; CHECK-NOFP: agr %r1, %r15
; CHECK-NOFP: mviy 4096(%r1), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f6:
+; CHECK-FP-LABEL: f6:
; CHECK-FP: llilh %r1, 8
; CHECK-FP: agr %r1, %r11
; CHECK-FP: mviy 4096(%r1), 42
@@ -149,13 +149,13 @@ define void @f6() {
; anchors 0x10000 bytes apart, so that the high part can be loaded using
; LLILH while still using MVI in more cases than 0x40000 anchors would.
define void @f7() {
-; CHECK-NOFP: f7:
+; CHECK-NOFP-LABEL: f7:
; CHECK-NOFP: llilh %r1, 23
; CHECK-NOFP: agr %r1, %r15
; CHECK-NOFP: mviy 65535(%r1), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f7:
+; CHECK-FP-LABEL: f7:
; CHECK-FP: llilh %r1, 23
; CHECK-FP: agr %r1, %r11
; CHECK-FP: mviy 65535(%r1), 42
@@ -172,13 +172,13 @@ define void @f7() {
; Keep the object-relative offset the same but bump the size of the
; objects by one doubleword.
define void @f8() {
-; CHECK-NOFP: f8:
+; CHECK-NOFP-LABEL: f8:
; CHECK-NOFP: llilh %r1, 24
; CHECK-NOFP: agr %r1, %r15
; CHECK-NOFP: mvi 7(%r1), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f8:
+; CHECK-FP-LABEL: f8:
; CHECK-FP: llilh %r1, 24
; CHECK-FP: agr %r1, %r11
; CHECK-FP: mvi 7(%r1), 42
@@ -200,14 +200,14 @@ define void @f8() {
; The LA then gets lowered into the LLILH/LA form. The exact sequence
; isn't that important though.
define void @f9() {
-; CHECK-NOFP: f9:
+; CHECK-NOFP-LABEL: f9:
; CHECK-NOFP: llilh [[R1:%r[1-5]]], 16
; CHECK-NOFP: la [[R2:%r[1-5]]], 8([[R1]],%r15)
; CHECK-NOFP: agfi [[R2]], 524288
; CHECK-NOFP: mvi 0([[R2]]), 42
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f9:
+; CHECK-FP-LABEL: f9:
; CHECK-FP: llilh [[R1:%r[1-5]]], 16
; CHECK-FP: la [[R2:%r[1-5]]], 8([[R1]],%r11)
; CHECK-FP: agfi [[R2]], 524288
@@ -226,7 +226,7 @@ define void @f9() {
; call-clobbered registers are live and no call-saved ones have been
; allocated).
define void @f10(i32 *%vptr) {
-; CHECK-NOFP: f10:
+; CHECK-NOFP-LABEL: f10:
; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
; CHECK-NOFP: llilh [[REGISTER]], 8
; CHECK-NOFP: agr [[REGISTER]], %r15
@@ -234,7 +234,7 @@ define void @f10(i32 *%vptr) {
; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f10:
+; CHECK-FP-LABEL: f10:
; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
; CHECK-FP: llilh [[REGISTER]], 8
; CHECK-FP: agr [[REGISTER]], %r11
@@ -265,7 +265,7 @@ define void @f10(i32 *%vptr) {
; However, the FP case uses %r11 as the frame pointer and must therefore
; spill a second register. This leads to an extra displacement of 8.
define void @f11(i32 *%vptr) {
-; CHECK-NOFP: f11:
+; CHECK-NOFP-LABEL: f11:
; CHECK-NOFP: stmg %r6, %r15,
; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
; CHECK-NOFP: llilh [[REGISTER]], 8
@@ -275,7 +275,7 @@ define void @f11(i32 *%vptr) {
; CHECK-NOFP: lmg %r6, %r15,
; CHECK-NOFP: br %r14
;
-; CHECK-FP: f11:
+; CHECK-FP-LABEL: f11:
; CHECK-FP: stmg %r6, %r15,
; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
; CHECK-FP: llilh [[REGISTER]], 8
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