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-rw-r--r--llvm/test/CodeGen/RISCV/rv64-large-stack.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/rv64-large-stack.ll b/llvm/test/CodeGen/RISCV/rv64-large-stack.ll
new file mode 100644
index 00000000000..bf862ac52aa
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rv64-large-stack.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
+;
+; The test case check that RV64 could handle the stack adjustment offset exceed
+; 32-bit.
+
+define void @foo() nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lui a0, 95
+; CHECK-NEXT: addiw a0, a0, 1505
+; CHECK-NEXT: slli a0, a0, 13
+; CHECK-NEXT: addi a0, a0, 32
+; CHECK-NEXT: sub sp, sp, a0
+; CHECK-NEXT: lui a0, 781250
+; CHECK-NEXT: addiw a0, a0, 24
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: sd ra, 0(a0)
+; CHECK-NEXT: addi a0, sp, 16
+; CHECK-NEXT: call baz
+; CHECK-NEXT: lui a0, 781250
+; CHECK-NEXT: addiw a0, a0, 24
+; CHECK-NEXT: add a0, sp, a0
+; CHECK-NEXT: ld ra, 0(a0)
+; CHECK-NEXT: lui a0, 95
+; CHECK-NEXT: addiw a0, a0, 1505
+; CHECK-NEXT: slli a0, a0, 13
+; CHECK-NEXT: addi a0, a0, 32
+; CHECK-NEXT: add sp, sp, a0
+; CHECK-NEXT: ret
+entry:
+ %w = alloca [100000000 x { fp128, fp128 }], align 16
+ %arraydecay = getelementptr inbounds [100000000 x { fp128, fp128 }], [100000000 x { fp128, fp128 }]* %w, i64 0, i64 0
+ call void @baz({ fp128, fp128 }* nonnull %arraydecay)
+ ret void
+}
+
+declare void @baz({ fp128, fp128 }*)
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