diff options
Diffstat (limited to 'llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll | 172 |
1 files changed, 86 insertions, 86 deletions
diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll index 1c192ea659c..641c8caf7e2 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll @@ -5,11 +5,11 @@ declare { float, i1 } @llvm.AMDGPU.div.scale.f32(float, float, i1) nounwind read declare { double, i1 } @llvm.AMDGPU.div.scale.f64(double, double, i1) nounwind readnone ; SI-LABEL @test_div_scale_f32_1: -; SI-DAG: BUFFER_LOAD_DWORD [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 -; SI-DAG: BUFFER_LOAD_DWORD [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 +; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_1(float addrspace(1)* %out, float addrspace(1)* %in) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid @@ -25,11 +25,11 @@ define void @test_div_scale_f32_1(float addrspace(1)* %out, float addrspace(1)* } ; SI-LABEL @test_div_scale_f32_2: -; SI-DAG: BUFFER_LOAD_DWORD [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 -; SI-DAG: BUFFER_LOAD_DWORD [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 +; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_2(float addrspace(1)* %out, float addrspace(1)* %in) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep.0 = getelementptr float addrspace(1)* %in, i32 %tid @@ -45,11 +45,11 @@ define void @test_div_scale_f32_2(float addrspace(1)* %out, float addrspace(1)* } ; SI-LABEL @test_div_scale_f64_1: -; SI-DAG: BUFFER_LOAD_DWORDX2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 -; SI-DAG: BUFFER_LOAD_DWORDX2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x8 -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 +; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x8 +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_1(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %in) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep.0 = getelementptr double addrspace(1)* %in, i32 %tid @@ -65,11 +65,11 @@ define void @test_div_scale_f64_1(double addrspace(1)* %out, double addrspace(1) } ; SI-LABEL @test_div_scale_f64_1: -; SI-DAG: BUFFER_LOAD_DWORDX2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 -; SI-DAG: BUFFER_LOAD_DWORDX2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x8 -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 +; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x8 +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_2(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %in) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep.0 = getelementptr double addrspace(1)* %in, i32 %tid @@ -85,11 +85,11 @@ define void @test_div_scale_f64_2(double addrspace(1)* %out, double addrspace(1) } ; SI-LABEL @test_div_scale_f32_scalar_num_1: -; SI-DAG: BUFFER_LOAD_DWORD [[B:v[0-9]+]] -; SI-DAG: S_LOAD_DWORD [[A:s[0-9]+]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[B:v[0-9]+]] +; SI-DAG: s_load_dword [[A:s[0-9]+]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_scalar_num_1(float addrspace(1)* %out, float addrspace(1)* %in, float %a) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr float addrspace(1)* %in, i32 %tid @@ -103,11 +103,11 @@ define void @test_div_scale_f32_scalar_num_1(float addrspace(1)* %out, float add } ; SI-LABEL @test_div_scale_f32_scalar_num_2: -; SI-DAG: BUFFER_LOAD_DWORD [[B:v[0-9]+]] -; SI-DAG: S_LOAD_DWORD [[A:s[0-9]+]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[B:v[0-9]+]] +; SI-DAG: s_load_dword [[A:s[0-9]+]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_scalar_num_2(float addrspace(1)* %out, float addrspace(1)* %in, float %a) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr float addrspace(1)* %in, i32 %tid @@ -121,11 +121,11 @@ define void @test_div_scale_f32_scalar_num_2(float addrspace(1)* %out, float add } ; SI-LABEL @test_div_scale_f32_scalar_den_1: -; SI-DAG: BUFFER_LOAD_DWORD [[A:v[0-9]+]] -; SI-DAG: S_LOAD_DWORD [[B:s[0-9]+]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[A:v[0-9]+]] +; SI-DAG: s_load_dword [[B:s[0-9]+]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_scalar_den_1(float addrspace(1)* %out, float addrspace(1)* %in, float %b) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr float addrspace(1)* %in, i32 %tid @@ -139,11 +139,11 @@ define void @test_div_scale_f32_scalar_den_1(float addrspace(1)* %out, float add } ; SI-LABEL @test_div_scale_f32_scalar_den_2: -; SI-DAG: BUFFER_LOAD_DWORD [[A:v[0-9]+]] -; SI-DAG: S_LOAD_DWORD [[B:s[0-9]+]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[A:v[0-9]+]] +; SI-DAG: s_load_dword [[B:s[0-9]+]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_scalar_den_2(float addrspace(1)* %out, float addrspace(1)* %in, float %b) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr float addrspace(1)* %in, i32 %tid @@ -157,11 +157,11 @@ define void @test_div_scale_f32_scalar_den_2(float addrspace(1)* %out, float add } ; SI-LABEL @test_div_scale_f64_scalar_num_1: -; SI-DAG: BUFFER_LOAD_DWORDX2 [[B:v\[[0-9]+:[0-9]+\]]] -; SI-DAG: S_LOAD_DWORDX2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]] +; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_scalar_num_1(double addrspace(1)* %out, double addrspace(1)* %in, double %a) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr double addrspace(1)* %in, i32 %tid @@ -175,11 +175,11 @@ define void @test_div_scale_f64_scalar_num_1(double addrspace(1)* %out, double a } ; SI-LABEL @test_div_scale_f64_scalar_num_2: -; SI-DAG: S_LOAD_DWORDX2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI-DAG: BUFFER_LOAD_DWORDX2 [[B:v\[[0-9]+:[0-9]+\]]] -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]] +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_scalar_num_2(double addrspace(1)* %out, double addrspace(1)* %in, double %a) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr double addrspace(1)* %in, i32 %tid @@ -193,11 +193,11 @@ define void @test_div_scale_f64_scalar_num_2(double addrspace(1)* %out, double a } ; SI-LABEL @test_div_scale_f64_scalar_den_1: -; SI-DAG: BUFFER_LOAD_DWORDX2 [[A:v\[[0-9]+:[0-9]+\]]] -; SI-DAG: S_LOAD_DWORDX2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] +; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_scalar_den_1(double addrspace(1)* %out, double addrspace(1)* %in, double %b) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr double addrspace(1)* %in, i32 %tid @@ -211,11 +211,11 @@ define void @test_div_scale_f64_scalar_den_1(double addrspace(1)* %out, double a } ; SI-LABEL @test_div_scale_f64_scalar_den_2: -; SI-DAG: BUFFER_LOAD_DWORDX2 [[A:v\[[0-9]+:[0-9]+\]]] -; SI-DAG: S_LOAD_DWORDX2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]] +; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_scalar_den_2(double addrspace(1)* %out, double addrspace(1)* %in, double %b) nounwind { %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone %gep = getelementptr double addrspace(1)* %in, i32 %tid @@ -229,12 +229,12 @@ define void @test_div_scale_f64_scalar_den_2(double addrspace(1)* %out, double a } ; SI-LABEL @test_div_scale_f32_all_scalar_1: -; SI-DAG: S_LOAD_DWORD [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb -; SI-DAG: S_LOAD_DWORD [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc -; SI: V_MOV_B32_e32 [[VA:v[0-9]+]], [[A]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[VA]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb +; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc +; SI: v_mov_b32_e32 [[VA:v[0-9]+]], [[A]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[VA]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_all_scalar_1(float addrspace(1)* %out, float %a, float %b) nounwind { %result = call { float, i1 } @llvm.AMDGPU.div.scale.f32(float %a, float %b, i1 false) nounwind readnone %result0 = extractvalue { float, i1 } %result, 0 @@ -243,12 +243,12 @@ define void @test_div_scale_f32_all_scalar_1(float addrspace(1)* %out, float %a, } ; SI-LABEL @test_div_scale_f32_all_scalar_2: -; SI-DAG: S_LOAD_DWORD [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb -; SI-DAG: S_LOAD_DWORD [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc -; SI: V_MOV_B32_e32 [[VB:v[0-9]+]], [[B]] -; SI: V_DIV_SCALE_F32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[VB]], [[A]] -; SI: BUFFER_STORE_DWORD [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xb +; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0xc +; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[B]] +; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[VB]], [[A]] +; SI: buffer_store_dword [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f32_all_scalar_2(float addrspace(1)* %out, float %a, float %b) nounwind { %result = call { float, i1 } @llvm.AMDGPU.div.scale.f32(float %a, float %b, i1 true) nounwind readnone %result0 = extractvalue { float, i1 } %result, 0 @@ -257,13 +257,13 @@ define void @test_div_scale_f32_all_scalar_2(float addrspace(1)* %out, float %a, } ; SI-LABEL @test_div_scale_f64_all_scalar_1: -; SI-DAG: S_LOAD_DWORDX2 s{{\[}}[[A_LO:[0-9]+]]:[[A_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xb -; SI-DAG: S_LOAD_DWORDX2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI-DAG: V_MOV_B32_e32 v[[VA_LO:[0-9]+]], s[[A_LO]] -; SI-DAG: V_MOV_B32_e32 v[[VA_HI:[0-9]+]], s[[A_HI]] -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], v{{\[}}[[VA_LO]]:[[VA_HI]]{{\]}} -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: s_load_dwordx2 s{{\[}}[[A_LO:[0-9]+]]:[[A_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xb +; SI-DAG: s_load_dwordx2 [[B:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI-DAG: v_mov_b32_e32 v[[VA_LO:[0-9]+]], s[[A_LO]] +; SI-DAG: v_mov_b32_e32 v[[VA_HI:[0-9]+]], s[[A_HI]] +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], v{{\[}}[[VA_LO]]:[[VA_HI]]{{\]}} +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_all_scalar_1(double addrspace(1)* %out, double %a, double %b) nounwind { %result = call { double, i1 } @llvm.AMDGPU.div.scale.f64(double %a, double %b, i1 false) nounwind readnone %result0 = extractvalue { double, i1 } %result, 0 @@ -272,13 +272,13 @@ define void @test_div_scale_f64_all_scalar_1(double addrspace(1)* %out, double % } ; SI-LABEL @test_div_scale_f64_all_scalar_2: -; SI-DAG: S_LOAD_DWORDX2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb -; SI-DAG: S_LOAD_DWORDX2 s{{\[}}[[B_LO:[0-9]+]]:[[B_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xd -; SI-DAG: V_MOV_B32_e32 v[[VB_LO:[0-9]+]], s[[B_LO]] -; SI-DAG: V_MOV_B32_e32 v[[VB_HI:[0-9]+]], s[[B_HI]] -; SI: V_DIV_SCALE_F64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], v{{\[}}[[VB_LO]]:[[VB_HI]]{{\]}}, [[A]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT0]] -; SI: S_ENDPGM +; SI-DAG: s_load_dwordx2 [[A:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb +; SI-DAG: s_load_dwordx2 s{{\[}}[[B_LO:[0-9]+]]:[[B_HI:[0-9]+]]{{\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xd +; SI-DAG: v_mov_b32_e32 v[[VB_LO:[0-9]+]], s[[B_LO]] +; SI-DAG: v_mov_b32_e32 v[[VB_HI:[0-9]+]], s[[B_HI]] +; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], v{{\[}}[[VB_LO]]:[[VB_HI]]{{\]}}, [[A]] +; SI: buffer_store_dwordx2 [[RESULT0]] +; SI: s_endpgm define void @test_div_scale_f64_all_scalar_2(double addrspace(1)* %out, double %a, double %b) nounwind { %result = call { double, i1 } @llvm.AMDGPU.div.scale.f64(double %a, double %b, i1 true) nounwind readnone %result0 = extractvalue { double, i1 } %result, 0 |
