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-rw-r--r--llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/mcm-obj.ll5
2 files changed, 3 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
index 1990f6b51d5..5317829c6ce 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
@@ -196,7 +196,7 @@ define void @t17(i64 %v) nounwind {
%1 = add nsw i64 %v, 1
store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8
; ELF64: addis
-; ELF64: ld
+; ELF64: addi
; ELF64: addi
; ELF64: lis
; ELF64: ori
diff --git a/llvm/test/CodeGen/PowerPC/mcm-obj.ll b/llvm/test/CodeGen/PowerPC/mcm-obj.ll
index 6b5b0c2b742..fa899b5b301 100644
--- a/llvm/test/CodeGen/PowerPC/mcm-obj.ll
+++ b/llvm/test/CodeGen/PowerPC/mcm-obj.ll
@@ -108,11 +108,10 @@ entry:
ret i32 %0
}
-; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
-; accessing tentatively declared variable ti.
+; Verify generation of relocations foraccessing variable ti.
;
; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
-; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
+; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM6]]
;
; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]]
; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]]
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