diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/pr39815.ll | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/pr40922.ll | 36 |
2 files changed, 38 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/PowerPC/pr39815.ll b/llvm/test/CodeGen/PowerPC/pr39815.ll index a01c8be8634..062e055167c 100644 --- a/llvm/test/CodeGen/PowerPC/pr39815.ll +++ b/llvm/test/CodeGen/PowerPC/pr39815.ll @@ -20,10 +20,9 @@ entry: ; CHECK: # %bb.0: ; CHECK-DAG: addis [[REG1:[0-9]+]], [[REG2:[0-9]+]], [[VAR1:[a-z0-9A-Z_.]+]]@toc@ha ; CHECK-DAG: ld [[REG3:[0-9]+]], [[VAR1]]@toc@l([[REG1]]) -; CHECK-DAG: lbz [[REG4:[0-9]+]], 0([[REG3]]) +; CHECK-DAG: lwz [[REG4:[0-9]+]], 0([[REG3]]) ; CHECK-DAG: addic [[REG5:[0-9]+]], [[REG3]], -1 -; CHECK-DAG: extsb [[REG6:[0-9]+]], [[REG4]] -; CHECK-DAG: addze [[REG7:[0-9]+]], [[REG6]] +; CHECK-DAG: addze [[REG7:[0-9]+]], [[REG4]] ; CHECK-DAG: addis [[REG8:[0-9]+]], [[REG2]], [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha ; CHECK-DAG: andi. [[REG9:[0-9]+]], [[REG7]], 5 ; CHECK-DAG: stb [[REG9]], [[VAR2]]@toc@l([[REG8]]) diff --git a/llvm/test/CodeGen/PowerPC/pr40922.ll b/llvm/test/CodeGen/PowerPC/pr40922.ll new file mode 100644 index 00000000000..291070bdd24 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/pr40922.ll @@ -0,0 +1,36 @@ +; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s + +; Test case adapted from PR40922. + +@a.b = internal global i32 0, align 4 + +define i32 @a() { +entry: + %call = tail call i32 bitcast (i32 (...)* @d to i32 ()*)() + %0 = load i32, i32* @a.b, align 4 + %conv = zext i32 %0 to i64 + %add = add nuw nsw i64 %conv, 6 + %and = and i64 %add, 8589934575 + %cmp = icmp ult i64 %and, %conv + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %call3 = tail call i32 bitcast (i32 (...)* @e to i32 ()*)() + br label %if.end + +if.end: ; preds = %if.then, %entry + store i32 %call, i32* @a.b, align 4 + ret i32 undef +} + +; CHECK-LABEL: @a +; CHECK: li 5, 0 +; CHECK: mr 30, 3 +; CHECK: addic 6, 4, 6 +; CHECK: addze 5, 5 +; CHECK: rlwinm 6, 6, 0, 28, 26 +; CHECK: andi. 5, 5, 1 + +declare i32 @d(...) + +declare i32 @e(...) |
