diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fma-mutate.ll | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/licm-remat.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/opt-li-add-to-addi.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/tail-dup-layout.ll | 2 |
6 files changed, 7 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll b/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll index fa5916aa98e..c72523f3593 100644 --- a/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll +++ b/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll @@ -20,9 +20,9 @@ define noalias i8* @_ZN2CC3funEv(%class.CC* %this) { ; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_offset lr, 16 ; CHECK-NEXT: .cfi_offset r30, -16 -; CHECK-NEXT: ld 12, 0(3) ; CHECK-NEXT: std 30, 32(1) ; CHECK-NEXT: mr 30, 3 +; CHECK-NEXT: ld 12, 0(30) ; CHECK-NEXT: std 2, 24(1) ; CHECK-NEXT: mtctr 12 ; CHECK-NEXT: bctrl diff --git a/llvm/test/CodeGen/PowerPC/fma-mutate.ll b/llvm/test/CodeGen/PowerPC/fma-mutate.ll index 1d4695b3181..633afa45115 100644 --- a/llvm/test/CodeGen/PowerPC/fma-mutate.ll +++ b/llvm/test/CodeGen/PowerPC/fma-mutate.ll @@ -14,8 +14,7 @@ define double @foo3(double %a) nounwind { ret double %r ; CHECK: @foo3 -; CHECK: fmr [[REG:[0-9]+]], [[REG2:[0-9]+]] -; CHECK: xsnmsubadp [[REG]], {{[0-9]+}}, [[REG2]] +; CHECK: xsnmsubadp [[REG:[0-9]+]], {{[0-9]+}}, [[REG]] ; CHECK: xsmaddmdp ; CHECK: xsmaddadp } diff --git a/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll b/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll index be9df368df4..218241ae0a7 100644 --- a/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll +++ b/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll @@ -16,8 +16,8 @@ if.end: ; preds = %if.then, %entry ret i32 %e.0 ; CHECK: @foo ; CHECK: mr [[NEWREG:[0-9]+]], 3 -; CHECK: mr [[REG1:[0-9]+]], 4 ; CHECK: mtvsrd [[NEWREG2:[0-9]+]], 4 +; CHECK: mffprd [[REG1:[0-9]+]], [[NEWREG2]] ; CHECK: add {{[0-9]+}}, [[NEWREG]], [[REG1]] ; CHECK: mffprd [[REG2:[0-9]+]], [[NEWREG2]] ; CHECK: add {{[0-9]+}}, [[REG2]], [[NEWREG]] diff --git a/llvm/test/CodeGen/PowerPC/licm-remat.ll b/llvm/test/CodeGen/PowerPC/licm-remat.ll index 0473709bb57..e72a8b0cd3e 100644 --- a/llvm/test/CodeGen/PowerPC/licm-remat.ll +++ b/llvm/test/CodeGen/PowerPC/licm-remat.ll @@ -20,8 +20,8 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture r define linkonce_odr void @ZN6snappyDecompressor_(%"class.snappy::SnappyDecompressor"* %this, %"class.snappy::SnappyIOVecWriter"* %writer) { ; CHECK-LABEL: ZN6snappyDecompressor_: ; CHECK: # %bb.0: # %entry -; CHECK: addis 23, 2, _ZN6snappy8internalL8wordmaskE@toc@ha -; CHECK-DAG: addi 25, 23, _ZN6snappy8internalL8wordmaskE@toc@l +; CHECK: addis 3, 2, _ZN6snappy8internalL8wordmaskE@toc@ha +; CHECK-DAG: addi 25, 3, _ZN6snappy8internalL8wordmaskE@toc@l ; CHECK-DAG: addis 5, 2, _ZN6snappy8internalL10char_tableE@toc@ha ; CHECK-DAG: addi 24, 5, _ZN6snappy8internalL10char_tableE@toc@l ; CHECK: b .LBB0_2 diff --git a/llvm/test/CodeGen/PowerPC/opt-li-add-to-addi.ll b/llvm/test/CodeGen/PowerPC/opt-li-add-to-addi.ll index 67fd5d3e308..43d8445b7cf 100644 --- a/llvm/test/CodeGen/PowerPC/opt-li-add-to-addi.ll +++ b/llvm/test/CodeGen/PowerPC/opt-li-add-to-addi.ll @@ -3,7 +3,7 @@ define i64 @testOptimizeLiAddToAddi(i64 %a) { ; CHECK-LABEL: testOptimizeLiAddToAddi: -; CHECK: addi 3, 3, 2444 +; CHECK: addi 3, 30, 2444 ; CHECK: bl callv ; CHECK: addi 3, 30, 234 ; CHECK: bl call diff --git a/llvm/test/CodeGen/PowerPC/tail-dup-layout.ll b/llvm/test/CodeGen/PowerPC/tail-dup-layout.ll index a4e232941c8..c9019983e93 100644 --- a/llvm/test/CodeGen/PowerPC/tail-dup-layout.ll +++ b/llvm/test/CodeGen/PowerPC/tail-dup-layout.ll @@ -25,7 +25,7 @@ target triple = "powerpc64le-grtev4-linux-gnu" ;CHECK-LABEL: straight_test: ; test1 may have been merged with entry ;CHECK: mr [[TAGREG:[0-9]+]], 3 -;CHECK: andi. {{[0-9]+}}, [[TAGREG:[0-9]+]], 1 +;CHECK: andi. {{[0-9]+}}, [[TAGREG]], 1 ;CHECK-NEXT: bc 12, 1, .[[OPT1LABEL:[_0-9A-Za-z]+]] ;CHECK-NEXT: # %test2 ;CHECK-NEXT: rlwinm. {{[0-9]+}}, [[TAGREG]], 0, 30, 30 |
