diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
6 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir index a0c461f9beb..bf006f7a043 100644 --- a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir +++ b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir @@ -1106,7 +1106,7 @@ body: | %0 = COPY $x3 %2 = LI 88 %3 = SLDo %0, killed %2, implicit-def $cr0 - ; CHECK: ANDIo8 %0, 0, implicit-def $cr0 + ; CHECK: ANDI8o %0, 0, implicit-def $cr0 ; CHECK-LATE: andi. 5, 3, 0 %4 = COPY killed $cr0 %5 = ISEL8 %1, %0, %4.sub_eq @@ -1212,7 +1212,7 @@ body: | %0 = COPY $x3 %2 = LI 64 %3 = SRDo %0, killed %2, implicit-def $cr0 - ; CHECK: ANDIo8 %0, 0, implicit-def $cr0 + ; CHECK: ANDI8o %0, 0, implicit-def $cr0 ; CHECK-LATE: andi. 5, 3, 0 %4 = COPY killed $cr0 %5 = ISEL8 %1, %0, %4.sub_eq diff --git a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir index 3401a421085..18dfe9dae6c 100644 --- a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir +++ b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir @@ -1498,7 +1498,7 @@ body: | %1 = LI8 321 %0 = COPY $x3 %2 = AND8o %1, %0, implicit-def $cr0 - ; CHECK: ANDIo8 %0, 321, implicit-def $cr0 + ; CHECK: ANDI8o %0, 321, implicit-def $cr0 ; CHECK-LATE: andi. 5, 3, 321 %3 = COPY killed $cr0 %4 = ISEL8 %1, %0, %3.sub_eq @@ -3928,7 +3928,7 @@ body: | %1 = COPY $x4 %0 = LI8 -1 %2 = RLDICLo %0, 53, 48, implicit-def $cr0 - ; CHECK: ANDIo8 %0, 65535 + ; CHECK: ANDI8o %0, 65535 ; CHECK-LATE: li 3, -1 ; CHECK-LATE: andi. 3, 3, 65535 %3 = COPY killed $cr0 @@ -3983,7 +3983,7 @@ body: | %0 = LI8 200 %2 = RLDICLo %0, 61, 3, implicit-def $cr0 ; CHECK: LI8 25 - ; CHECK: ANDIo8 %0, 25 + ; CHECK: ANDI8o %0, 25 ; CHECK-LATE-NOT: andi. %3 = COPY killed $cr0 %4 = ISEL8 %1, %2, %3.sub_eq @@ -4036,7 +4036,7 @@ body: | %1 = COPY $x4 %0 = LI8 2 %2 = RLDICLo %0, 32, 32, implicit-def $cr0 - ; CHECK: ANDIo8 %0, 0 + ; CHECK: ANDI8o %0, 0 ; CHECK-LATE: li 3, 2 ; CHECK-LATE: andi. 3, 3, 0 %3 = COPY killed $cr0 @@ -4365,7 +4365,7 @@ body: | %3 = LI -22 %4 = RLWINMo %3, 5, 24, 31, implicit-def $cr0 ; CHECK: LI -22 - ; CHECK-NOT: ANDIo8 %3, 65514 + ; CHECK-NOT: ANDI8o %3, 65514 ; CHECK-LATE-NOT: andi. %5 = COPY killed $cr0 %6 = ISEL %2, %3, %5.sub_eq @@ -4426,7 +4426,7 @@ body: | %0 = COPY $x3 %2 = LI8 -18 %3 = RLWINM8o %2, 4, 20, 27, implicit-def $cr0 - ; CHECK: ANDIo8 %2, 3808 + ; CHECK: ANDI8o %2, 3808 ; CHECK-LATE: li 3, -18 ; CHECK-LATE: andi. 3, 3, 3808 %7 = COPY killed $cr0 diff --git a/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir b/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir index bf8ce2b694a..5f52bde1ede 100644 --- a/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir +++ b/llvm/test/CodeGen/PowerPC/ifcvt-diamond-ret.mir @@ -6,7 +6,7 @@ body: | liveins: $x0, $x3 successors: %bb.1(0x40000000), %bb.2(0x40000000) - dead renamable $x3 = ANDIo8 killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt + dead renamable $x3 = ANDI8o killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt $cr2lt = CROR $cr0gt, $cr0gt BCn killed renamable $cr2lt, %bb.2 B %bb.1 @@ -26,7 +26,7 @@ body: | # CHECK: body: | # CHECK: bb.0: -# CHECK: dead renamable $x3 = ANDIo8 killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt +# CHECK: dead renamable $x3 = ANDI8o killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt # CHECK: $cr2lt = CROR $cr0gt, $cr0gt # CHECK: renamable $x3 = LIS8 4096 # CHECK: MTLR8 $x0, implicit-def $lr8 diff --git a/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll b/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll index a247be7852c..fac7522db04 100644 --- a/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll +++ b/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll @@ -7,11 +7,11 @@ define signext i32 @fn1(i32 %baz) { %2 = zext i32 %1 to i64 %3 = shl i64 %2, 48 %4 = ashr exact i64 %3, 48 -; CHECK: ANDIo8 killed {{[^,]+}}, 65520, implicit-def dead $cr0 +; CHECK: ANDI8o killed {{[^,]+}}, 65520, implicit-def dead $cr0 ; CHECK: CMPLDI ; CHECK: BCC -; CHECK: ANDIo8 {{[^,]+}}, 65520, implicit-def $cr0 +; CHECK: ANDI8o {{[^,]+}}, 65520, implicit-def $cr0 ; CHECK: COPY $cr0 ; CHECK: BCC %5 = icmp eq i64 %4, 0 diff --git a/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir b/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir index 9f50a0709a6..54bc7cdd05f 100644 --- a/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir +++ b/llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir @@ -14,14 +14,14 @@ body: | ; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x5 ; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x4 ; CHECK: [[COPY3:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3 - ; CHECK: [[ANDIo8_:%[0-9]+]]:g8rc = ANDIo8 [[COPY1]], 1, implicit-def $cr0 + ; CHECK: [[ANDI8o_:%[0-9]+]]:g8rc = ANDI8o [[COPY1]], 1, implicit-def $cr0 ; CHECK: [[COPY4:%[0-9]+]]:crbitrc = COPY $cr0gt ; CHECK: BCn killed [[COPY4]], %bb.2 ; CHECK: B %bb.1 ; CHECK: bb.1: ; CHECK: liveins: $x3 ; CHECK: [[EXTSW:%[0-9]+]]:g8rc = EXTSW $x3 - ; CHECK: [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[ANDIo8_]], 2, 61 + ; CHECK: [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[ANDI8o_]], 2, 61 ; CHECK: $x3 = COPY [[RLDICR]] ; CHECK: [[RLDICR1:%[0-9]+]]:g8rc = RLDICR [[EXTSW]], 2, 61 ; CHECK: [[ADD8_:%[0-9]+]]:g8rc = ADD8 [[COPY3]], [[RLDICR1]] @@ -41,7 +41,7 @@ body: | %3:g8rc = COPY $x5 %2:g8rc = COPY $x4 %1:g8rc_and_g8rc_nox0 = COPY $x3 - %11:g8rc = ANDIo8 %3, 1, implicit-def $cr0 + %11:g8rc = ANDI8o %3, 1, implicit-def $cr0 %6:crbitrc = COPY $cr0gt BCn killed %6, %bb.2 B %bb.1 diff --git a/llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir b/llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir index 95ee0a5e027..1632e64b7b8 100644 --- a/llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir +++ b/llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir @@ -297,7 +297,7 @@ body: | %0:g8rc = LI8 -11 %2:g8rc_and_g8rc_nox0 = RLDICLo %0, 2, 49, implicit-def $cr0 ; CHECK: LI8 32727 - ; CHECK: ANDIo8 %0, 32727 + ; CHECK: ANDI8o %0, 32727 ; CHECK-LATE-NOT: andi. ; CHECK-LATE: rldicl. %3:crrc = COPY killed $cr0 @@ -351,7 +351,7 @@ body: | %0:g8rc_and_g8rc_nox0 = LI8 1 %2:g8rc = RLDICLo %0, 32, 33, implicit-def $cr0 ; CHECK: LI8 1 - ; CHECK: ANDIo8 %0, 0 + ; CHECK: ANDI8o %0, 0 ; CHECK-LATE: li [[IMM:[0-9]+]], 1 ; CHECK-LATE: andi. {{[0-9]+}}, [[IMM]], 0 %3:crrc = COPY killed $cr0 @@ -405,7 +405,7 @@ body: | %0:g8rc_and_g8rc_nox0 = LI8 -11 %2:g8rc = RLDICLo %0, 2, 49, implicit-def $cr0 ; CHECK: LI8 -11 - ; CHECK: ANDIo8 %0, 65525 + ; CHECK: ANDI8o %0, 65525 ; CHECK-LATE-NOT: andi. ; CHECK-LATE: rldicl. %3:crrc = COPY killed $cr0 |
