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-rw-r--r--llvm/test/CodeGen/PowerPC/swaps-le-2.ll31
1 files changed, 19 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/PowerPC/swaps-le-2.ll b/llvm/test/CodeGen/PowerPC/swaps-le-2.ll
index 0963b92609f..e7751a194f7 100644
--- a/llvm/test/CodeGen/PowerPC/swaps-le-2.ll
+++ b/llvm/test/CodeGen/PowerPC/swaps-le-2.ll
@@ -2,6 +2,13 @@
; Test swap removal when a vector splat must be adjusted to make it legal.
;
+
+; LH: 2016-11-17
+; Updated align attritue from 16 to 8 to keep swap instructions tests.
+; Changes have been made on little-endian to use lvx and stvx
+; instructions instead of lxvd2x/xxswapd and xxswapd/stxvd2x for
+; aligned vectors with elements up to 4 bytes
+
; Test generated from following C code:
;
; vector char vc = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
@@ -28,37 +35,37 @@
; vir = (vector int){vi[1], vi[1], vi[1], vi[1]};
; }
-@vc = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
-@vs = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, align 16
-@vi = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
-@vcr = common global <16 x i8> zeroinitializer, align 16
-@vsr = common global <8 x i16> zeroinitializer, align 16
-@vir = common global <4 x i32> zeroinitializer, align 16
+@vc = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 8
+@vs = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, align 8
+@vi = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 8
+@vcr = common global <16 x i8> zeroinitializer, align 8
+@vsr = common global <8 x i16> zeroinitializer, align 8
+@vir = common global <4 x i32> zeroinitializer, align 8
; Function Attrs: nounwind
define void @cfoo() {
entry:
- %0 = load <16 x i8>, <16 x i8>* @vc, align 16
+ %0 = load <16 x i8>, <16 x i8>* @vc, align 8
%vecinit30 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
- store <16 x i8> %vecinit30, <16 x i8>* @vcr, align 16
+ store <16 x i8> %vecinit30, <16 x i8>* @vcr, align 8
ret void
}
; Function Attrs: nounwind
define void @sfoo() {
entry:
- %0 = load <8 x i16>, <8 x i16>* @vs, align 16
+ %0 = load <8 x i16>, <8 x i16>* @vs, align 8
%vecinit14 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
- store <8 x i16> %vecinit14, <8 x i16>* @vsr, align 16
+ store <8 x i16> %vecinit14, <8 x i16>* @vsr, align 8
ret void
}
; Function Attrs: nounwind
define void @ifoo() {
entry:
- %0 = load <4 x i32>, <4 x i32>* @vi, align 16
+ %0 = load <4 x i32>, <4 x i32>* @vi, align 8
%vecinit6 = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
- store <4 x i32> %vecinit6, <4 x i32>* @vir, align 16
+ store <4 x i32> %vecinit6, <4 x i32>* @vir, align 8
ret void
}
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