diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/signbit-shift.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/signbit-shift.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/signbit-shift.ll b/llvm/test/CodeGen/PowerPC/signbit-shift.ll index 7bc9cef9590..d82fe842b03 100644 --- a/llvm/test/CodeGen/PowerPC/signbit-shift.ll +++ b/llvm/test/CodeGen/PowerPC/signbit-shift.ll @@ -240,3 +240,31 @@ define <4 x i32> @sub_lshr_not_vec_splat(<4 x i32> %x) { ret <4 x i32> %r } +define i32 @sub_lshr(i32 %x) { +; CHECK-LABEL: sub_lshr: +; CHECK: # %bb.0: +; CHECK-NEXT: srwi 3, 3, 31 +; CHECK-NEXT: subfic 3, 3, 43 +; CHECK-NEXT: blr + %sh = lshr i32 %x, 31 + %r = sub i32 43, %sh + ret i32 %r +} + +define <4 x i32> @sub_lshr_vec_splat(<4 x i32> %x) { +; CHECK-LABEL: sub_lshr_vec_splat: +; CHECK: # %bb.0: +; CHECK-NEXT: vspltisw 3, -16 +; CHECK-NEXT: vspltisw 4, 15 +; CHECK-NEXT: addis 3, 2, .LCPI19_0@toc@ha +; CHECK-NEXT: addi 3, 3, .LCPI19_0@toc@l +; CHECK-NEXT: vsubuwm 3, 4, 3 +; CHECK-NEXT: vsrw 2, 2, 3 +; CHECK-NEXT: lvx 3, 0, 3 +; CHECK-NEXT: vsubuwm 2, 3, 2 +; CHECK-NEXT: blr + %e = lshr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31> + %r = sub <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %e + ret <4 x i32> %r +} + |
