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-rw-r--r--llvm/test/CodeGen/Mips/inlineasm-operand-code.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
new file mode 100644
index 00000000000..4568a846585
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
@@ -0,0 +1,15 @@
+; Positive test for inline register constraints
+;
+; RUN: llc -march=mipsel < %s | FileCheck %s
+
+define i32 @main() nounwind {
+entry:
+
+; X with -3
+;CHECK: #APP
+;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
+;CHECK: #NO_APP
+ tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind
+
+ ret i32 0
+}
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