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| author | Eric Christopher <echristo@apple.com> | 2012-05-10 21:48:22 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2012-05-10 21:48:22 +0000 |
| commit | ed51b9ec0bc3c3887f64b74793cd7997039fefe2 (patch) | |
| tree | 27dc4285c3ffb7a0798ea910dd0f4d00cab6a5c2 /llvm/test/CodeGen/Mips/inlineasm-operand-code.ll | |
| parent | c5d7008f2713e9034db5131ecb006d7ef88c9e3a (diff) | |
| download | bcm5719-llvm-ed51b9ec0bc3c3887f64b74793cd7997039fefe2.tar.gz bcm5719-llvm-ed51b9ec0bc3c3887f64b74793cd7997039fefe2.zip | |
Add support for the 'X' inline asm operand modifier.
Patch by Jack Carter.
llvm-svn: 156577
Diffstat (limited to 'llvm/test/CodeGen/Mips/inlineasm-operand-code.ll')
| -rw-r--r-- | llvm/test/CodeGen/Mips/inlineasm-operand-code.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll new file mode 100644 index 00000000000..4568a846585 --- /dev/null +++ b/llvm/test/CodeGen/Mips/inlineasm-operand-code.ll @@ -0,0 +1,15 @@ +; Positive test for inline register constraints +; +; RUN: llc -march=mipsel < %s | FileCheck %s + +define i32 @main() nounwind { +entry: + +; X with -3 +;CHECK: #APP +;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd +;CHECK: #NO_APP + tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind + + ret i32 0 +} |
