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-rw-r--r--llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll106
1 files changed, 84 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
index 2e918adb125..4022efcafb6 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
@@ -57,6 +57,29 @@ entry:
ret i64 %and
}
+define i32 @and_imm(i32 %a) {
+; MIPS32-LABEL: and_imm:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: andi $2, $4, 255
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %and = and i32 %a, 255
+ ret i32 %and
+}
+
+define i32 @and_not_imm32ZExt16(i32 %a) {
+; MIPS32-LABEL: and_not_imm32ZExt16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $1, $zero, 65280
+; MIPS32-NEXT: and $2, $4, $1
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %and = and i32 %a, -256
+ ret i32 %and
+}
+
define i1 @or_i1(i1 %a, i1 %b) {
; MIPS32-LABEL: or_i1:
; MIPS32: # %bb.0: # %entry
@@ -113,6 +136,29 @@ entry:
ret i64 %or
}
+define i32 @or_imm(i32 %a) {
+; MIPS32-LABEL: or_imm:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: ori $2, $4, 65535
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %or = or i32 %a, 65535
+ ret i32 %or
+}
+
+define i32 @or_not_imm32ZExt16(i32 %a) {
+; MIPS32-LABEL: or_not_imm32ZExt16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: lui $1, 1
+; MIPS32-NEXT: or $2, $4, $1
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %or = or i32 %a, 65536
+ ret i32 %or
+}
+
define i1 @xor_i1(i1 %a, i1 %b) {
; MIPS32-LABEL: xor_i1:
; MIPS32: # %bb.0: # %entry
@@ -169,6 +215,28 @@ entry:
ret i64 %xor
}
+define i32 @xor_imm(i32 %a) {
+; MIPS32-LABEL: xor_imm:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: xori $2, $4, 1
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %xor = xor i32 %a, 1
+ ret i32 %xor
+}
+
+define i32 @xor_not_imm32ZExt16(i32 %a) {
+; MIPS32-LABEL: xor_not_imm32ZExt16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: not $2, $4
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ %xor = xor i32 %a, -1
+ ret i32 %xor
+}
+
define i32 @shl(i32 %a) {
; MIPS32-LABEL: shl:
; MIPS32: # %bb.0: # %entry
@@ -239,8 +307,7 @@ define i16 @shl_i16(i16 %a) {
; MIPS32-LABEL: shl_i16:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: ori $1, $zero, 2
-; MIPS32-NEXT: ori $2, $zero, 65535
-; MIPS32-NEXT: and $1, $1, $2
+; MIPS32-NEXT: andi $1, $1, 65535
; MIPS32-NEXT: sllv $2, $4, $1
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
@@ -253,8 +320,7 @@ define i8 @ashr_i8(i8 %a) {
; MIPS32-LABEL: ashr_i8:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: ori $1, $zero, 2
-; MIPS32-NEXT: ori $2, $zero, 255
-; MIPS32-NEXT: and $1, $1, $2
+; MIPS32-NEXT: andi $1, $1, 255
; MIPS32-NEXT: sll $2, $4, 24
; MIPS32-NEXT: sra $2, $2, 24
; MIPS32-NEXT: srav $2, $2, $1
@@ -269,9 +335,8 @@ define i16 @lshr_i16(i16 %a) {
; MIPS32-LABEL: lshr_i16:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: ori $1, $zero, 2
-; MIPS32-NEXT: ori $2, $zero, 65535
-; MIPS32-NEXT: and $1, $1, $2
-; MIPS32-NEXT: and $2, $4, $2
+; MIPS32-NEXT: andi $1, $1, 65535
+; MIPS32-NEXT: andi $2, $4, 65535
; MIPS32-NEXT: srlv $2, $2, $1
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
@@ -296,12 +361,11 @@ define i64 @shl_i64(i64 %a, i64 %b) {
; MIPS32-NEXT: sllv $6, $5, $6
; MIPS32-NEXT: or $3, $3, $6
; MIPS32-NEXT: sllv $2, $4, $2
-; MIPS32-NEXT: ori $4, $zero, 1
-; MIPS32-NEXT: and $6, $1, $4
-; MIPS32-NEXT: movn $8, $10, $6
-; MIPS32-NEXT: and $1, $1, $4
+; MIPS32-NEXT: andi $4, $1, 1
+; MIPS32-NEXT: movn $8, $10, $4
+; MIPS32-NEXT: andi $1, $1, 1
; MIPS32-NEXT: movn $2, $3, $1
-; MIPS32-NEXT: and $1, $9, $4
+; MIPS32-NEXT: andi $1, $9, 1
; MIPS32-NEXT: movn $2, $5, $1
; MIPS32-NEXT: sw $2, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: move $2, $8
@@ -328,12 +392,11 @@ define i64 @ashl_i64(i64 %a, i64 %b) {
; MIPS32-NEXT: or $3, $6, $3
; MIPS32-NEXT: sra $6, $5, 31
; MIPS32-NEXT: srav $2, $5, $2
-; MIPS32-NEXT: ori $5, $zero, 1
-; MIPS32-NEXT: and $10, $1, $5
-; MIPS32-NEXT: movn $2, $3, $10
-; MIPS32-NEXT: and $3, $8, $5
+; MIPS32-NEXT: andi $5, $1, 1
+; MIPS32-NEXT: movn $2, $3, $5
+; MIPS32-NEXT: andi $3, $8, 1
; MIPS32-NEXT: movn $2, $4, $3
-; MIPS32-NEXT: and $1, $1, $5
+; MIPS32-NEXT: andi $1, $1, 1
; MIPS32-NEXT: movn $6, $9, $1
; MIPS32-NEXT: move $3, $6
; MIPS32-NEXT: jr $ra
@@ -357,12 +420,11 @@ define i64 @lshr_i64(i64 %a, i64 %b) {
; MIPS32-NEXT: sllv $3, $5, $3
; MIPS32-NEXT: or $3, $6, $3
; MIPS32-NEXT: srlv $2, $5, $2
-; MIPS32-NEXT: ori $5, $zero, 1
-; MIPS32-NEXT: and $6, $1, $5
-; MIPS32-NEXT: movn $2, $3, $6
-; MIPS32-NEXT: and $3, $9, $5
+; MIPS32-NEXT: andi $5, $1, 1
+; MIPS32-NEXT: movn $2, $3, $5
+; MIPS32-NEXT: andi $3, $9, 1
; MIPS32-NEXT: movn $2, $4, $3
-; MIPS32-NEXT: and $1, $1, $5
+; MIPS32-NEXT: andi $1, $1, 1
; MIPS32-NEXT: movn $8, $10, $1
; MIPS32-NEXT: move $3, $8
; MIPS32-NEXT: jr $ra
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