summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/MSP430
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/MSP430')
-rw-r--r--llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll6
-rw-r--r--llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll4
-rw-r--r--llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll4
-rw-r--r--llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll8
-rw-r--r--llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll4
-rw-r--r--llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll14
-rw-r--r--llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll14
-rw-r--r--llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll14
-rw-r--r--llvm/test/CodeGen/MSP430/Inst16mi.ll8
-rw-r--r--llvm/test/CodeGen/MSP430/Inst16mm.ll22
-rw-r--r--llvm/test/CodeGen/MSP430/Inst16mr.ll10
-rw-r--r--llvm/test/CodeGen/MSP430/Inst16rm.ll10
-rw-r--r--llvm/test/CodeGen/MSP430/Inst8mi.ll8
-rw-r--r--llvm/test/CodeGen/MSP430/Inst8mm.ll18
-rw-r--r--llvm/test/CodeGen/MSP430/Inst8mr.ll10
-rw-r--r--llvm/test/CodeGen/MSP430/Inst8rm.ll10
-rw-r--r--llvm/test/CodeGen/MSP430/bit.ll24
-rw-r--r--llvm/test/CodeGen/MSP430/byval.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/indirectbr.ll4
-rw-r--r--llvm/test/CodeGen/MSP430/indirectbr2.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/inline-asm.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/jumptable.ll4
-rw-r--r--llvm/test/CodeGen/MSP430/memset.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/misched-msp430.ll2
-rw-r--r--llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll38
-rw-r--r--llvm/test/CodeGen/MSP430/postinc.ll10
29 files changed, 130 insertions, 130 deletions
diff --git a/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll b/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
index 4c7d2d09256..38e9832f526 100644
--- a/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
+++ b/llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
@@ -7,7 +7,7 @@ target triple = "msp430-unknown-linux-gnu"
define void @uip_arp_arpin() nounwind {
entry:
- %tmp = load volatile i16* @uip_len ; <i16> [#uses=1]
+ %tmp = load volatile i16, i16* @uip_len ; <i16> [#uses=1]
%cmp = icmp ult i16 %tmp, 42 ; <i1> [#uses=1]
store volatile i16 0, i16* @uip_len
br i1 %cmp, label %if.then, label %if.end
diff --git a/llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll b/llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll
index d622aa71164..30b373990a7 100644
--- a/llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll
+++ b/llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll
@@ -4,14 +4,14 @@ define i16 @rol1u16(i16 %x.arg) nounwind {
%retval = alloca i16
%x = alloca i16
store i16 %x.arg, i16* %x
- %1 = load i16* %x
+ %1 = load i16, i16* %x
%2 = shl i16 %1, 1
- %3 = load i16* %x
+ %3 = load i16, i16* %x
%4 = lshr i16 %3, 15
%5 = or i16 %2, %4
store i16 %5, i16* %retval
br label %return
return:
- %6 = load i16* %retval
+ %6 = load i16, i16* %retval
ret i16 %6
}
diff --git a/llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll b/llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll
index e23df785166..2e3dd5593ff 100644
--- a/llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll
+++ b/llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll
@@ -4,12 +4,12 @@ define i16 @lsr2u16(i16 %x.arg) nounwind {
%retval = alloca i16
%x = alloca i16
store i16 %x.arg, i16* %x
- %1 = load i16* %x
+ %1 = load i16, i16* %x
%2 = lshr i16 %1, 2
store i16 %2, i16* %retval
br label %return
return:
- %3 = load i16* %retval
+ %3 = load i16, i16* %retval
ret i16 %3
}
diff --git a/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll b/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
index e8c0d14afd2..ca54ff0c3b4 100644
--- a/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
+++ b/llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
@@ -7,7 +7,7 @@ define i16 @foo() nounwind readnone {
entry:
%result = alloca i16, align 1 ; <i16*> [#uses=2]
store volatile i16 0, i16* %result
- %tmp = load volatile i16* %result ; <i16> [#uses=1]
+ %tmp = load volatile i16, i16* %result ; <i16> [#uses=1]
ret i16 %tmp
}
@@ -23,7 +23,7 @@ while.cond: ; preds = %while.cond, %entry
while.end: ; preds = %while.cond
%result.i = alloca i16, align 1 ; <i16*> [#uses=2]
store volatile i16 0, i16* %result.i
- %tmp.i = load volatile i16* %result.i ; <i16> [#uses=0]
+ %tmp.i = load volatile i16, i16* %result.i ; <i16> [#uses=0]
ret i16 0
}
diff --git a/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
index 9fab4826e08..72ba335b54e 100644
--- a/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
+++ b/llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
@@ -11,12 +11,12 @@ entry:
%x.addr = alloca i8 ; <i8*> [#uses=2]
%tmp = alloca i8, align 1 ; <i8*> [#uses=2]
store i8 %x, i8* %x.addr
- %tmp1 = load volatile i8* @"\010x0021" ; <i8> [#uses=1]
+ %tmp1 = load volatile i8, i8* @"\010x0021" ; <i8> [#uses=1]
store i8 %tmp1, i8* %tmp
- %tmp2 = load i8* %x.addr ; <i8> [#uses=1]
+ %tmp2 = load i8, i8* %x.addr ; <i8> [#uses=1]
store volatile i8 %tmp2, i8* @"\010x0021"
- %tmp3 = load i8* %tmp ; <i8> [#uses=1]
+ %tmp3 = load i8, i8* %tmp ; <i8> [#uses=1]
store i8 %tmp3, i8* %retval
- %0 = load i8* %retval ; <i8> [#uses=1]
+ %0 = load i8, i8* %retval ; <i8> [#uses=1]
ret i8 %0
}
diff --git a/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll b/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
index c1a186a637c..6dfbbfc03e9 100644
--- a/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
+++ b/llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
@@ -4,7 +4,7 @@ define void @foo() nounwind {
entry:
%r = alloca i8 ; <i8*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- load volatile i8* %r, align 1 ; <i8>:0 [#uses=1]
+ load volatile i8, i8* %r, align 1 ; <i8>:0 [#uses=1]
or i8 %0, 1 ; <i8>:1 [#uses=1]
store volatile i8 %1, i8* %r, align 1
br label %return
diff --git a/llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll b/llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
index d5ff29c6ccd..04b087e9536 100644
--- a/llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
+++ b/llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
@@ -46,8 +46,8 @@ while.cond36.i: ; preds = %while.body41.i, %wh
br i1 undef, label %do.body, label %while.body41.i
while.body41.i: ; preds = %while.cond36.i
- %tmp43.i = load i8** @foo ; <i8*> [#uses=2]
- %tmp44.i = load i8* %tmp43.i ; <i8> [#uses=1]
+ %tmp43.i = load i8*, i8** @foo ; <i8*> [#uses=2]
+ %tmp44.i = load i8, i8* %tmp43.i ; <i8> [#uses=1]
%ptrincdec50.i = getelementptr inbounds i8, i8* %tmp43.i, i16 1 ; <i8*> [#uses=1]
store i8* %ptrincdec50.i, i8** @foo
%cmp55.i = icmp eq i8 %tmp44.i, %c ; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll b/llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
index 99100377034..907d6abe992 100644
--- a/llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
+++ b/llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
@@ -19,7 +19,7 @@ land.end: ; preds = %land.rhs, %while.co
br i1 %0, label %while.body, label %while.end
while.body: ; preds = %land.end
- %tmp4 = load i16* undef ; <i16> [#uses=0]
+ %tmp4 = load i16, i16* undef ; <i16> [#uses=0]
br label %while.cond
while.end: ; preds = %land.end
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
index 532a25cc155..1b0a508d06e 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -3,7 +3,7 @@ target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
target triple = "msp430-generic-generic"
define i16 @am1(i16 %x, i16* %a) nounwind {
- %1 = load i16* %a
+ %1 = load i16, i16* %a
%2 = or i16 %1,%x
ret i16 %2
}
@@ -13,7 +13,7 @@ define i16 @am1(i16 %x, i16* %a) nounwind {
@foo = external global i16
define i16 @am2(i16 %x) nounwind {
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = or i16 %1,%x
ret i16 %2
}
@@ -24,7 +24,7 @@ define i16 @am2(i16 %x) nounwind {
define i8 @am3(i8 %x, i16 %n) nounwind {
%1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %n
- %2 = load i8* %1
+ %2 = load i8, i8* %1
%3 = or i8 %2,%x
ret i8 %3
}
@@ -32,7 +32,7 @@ define i8 @am3(i8 %x, i16 %n) nounwind {
; CHECK: bis.b bar(r14), r15
define i16 @am4(i16 %x) nounwind {
- %1 = load volatile i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
%2 = or i16 %1,%x
ret i16 %2
}
@@ -41,7 +41,7 @@ define i16 @am4(i16 %x) nounwind {
define i16 @am5(i16 %x, i16* %a) nounwind {
%1 = getelementptr i16, i16* %a, i16 2
- %2 = load i16* %1
+ %2 = load i16, i16* %1
%3 = or i16 %2,%x
ret i16 %3
}
@@ -52,7 +52,7 @@ define i16 @am5(i16 %x, i16* %a) nounwind {
@baz = common global %S zeroinitializer, align 1
define i16 @am6(i16 %x) nounwind {
- %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %1 = load i16, i16* getelementptr (%S* @baz, i32 0, i32 1)
%2 = or i16 %1,%x
ret i16 %2
}
@@ -65,7 +65,7 @@ define i16 @am6(i16 %x) nounwind {
define i8 @am7(i8 %x, i16 %n) nounwind {
%1 = getelementptr %T, %T* @duh, i32 0, i32 1
%2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3= load i8* %2
+ %3= load i8, i8* %2
%4 = or i8 %3,%x
ret i8 %4
}
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
index c40ba1beee9..b40a48e8c1f 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
@@ -3,7 +3,7 @@ target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16"
target triple = "msp430-generic-generic"
define void @am1(i16* %a, i16 %x) nounwind {
- %1 = load i16* %a
+ %1 = load i16, i16* %a
%2 = or i16 %x, %1
store i16 %2, i16* %a
ret void
@@ -14,7 +14,7 @@ define void @am1(i16* %a, i16 %x) nounwind {
@foo = external global i16
define void @am2(i16 %x) nounwind {
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = or i16 %x, %1
store i16 %2, i16* @foo
ret void
@@ -26,7 +26,7 @@ define void @am2(i16 %x) nounwind {
define void @am3(i16 %i, i8 %x) nounwind {
%1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %i
- %2 = load i8* %1
+ %2 = load i8, i8* %1
%3 = or i8 %x, %2
store i8 %3, i8* %1
ret void
@@ -35,7 +35,7 @@ define void @am3(i16 %i, i8 %x) nounwind {
; CHECK: bis.b r14, bar(r15)
define void @am4(i16 %x) nounwind {
- %1 = load volatile i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
%2 = or i16 %x, %1
store volatile i16 %2, i16* inttoptr(i16 32 to i16*)
ret void
@@ -45,7 +45,7 @@ define void @am4(i16 %x) nounwind {
define void @am5(i16* %a, i16 %x) readonly {
%1 = getelementptr inbounds i16, i16* %a, i16 2
- %2 = load i16* %1
+ %2 = load i16, i16* %1
%3 = or i16 %x, %2
store i16 %3, i16* %1
ret void
@@ -57,7 +57,7 @@ define void @am5(i16* %a, i16 %x) readonly {
@baz = common global %S zeroinitializer
define void @am6(i16 %x) nounwind {
- %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %1 = load i16, i16* getelementptr (%S* @baz, i32 0, i32 1)
%2 = or i16 %x, %1
store i16 %2, i16* getelementptr (%S* @baz, i32 0, i32 1)
ret void
@@ -71,7 +71,7 @@ define void @am6(i16 %x) nounwind {
define void @am7(i16 %n, i8 %x) nounwind {
%1 = getelementptr %T, %T* @duh, i32 0, i32 1
%2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3 = load i8* %2
+ %3 = load i8, i8* %2
%4 = or i8 %x, %3
store i8 %4, i8* %2
ret void
diff --git a/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
index 0c2b965bf27..90c5744d138 100644
--- a/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
+++ b/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
@@ -3,7 +3,7 @@ target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
target triple = "msp430-generic-generic"
define i16 @am1(i16* %a) nounwind {
- %1 = load i16* %a
+ %1 = load i16, i16* %a
ret i16 %1
}
; CHECK-LABEL: am1:
@@ -12,7 +12,7 @@ define i16 @am1(i16* %a) nounwind {
@foo = external global i16
define i16 @am2() nounwind {
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
ret i16 %1
}
; CHECK-LABEL: am2:
@@ -22,14 +22,14 @@ define i16 @am2() nounwind {
define i8 @am3(i16 %n) nounwind {
%1 = getelementptr [2 x i8], [2 x i8]* @bar, i16 0, i16 %n
- %2 = load i8* %1
+ %2 = load i8, i8* %1
ret i8 %2
}
; CHECK-LABEL: am3:
; CHECK: mov.b bar(r15), r15
define i16 @am4() nounwind {
- %1 = load volatile i16* inttoptr(i16 32 to i16*)
+ %1 = load volatile i16, i16* inttoptr(i16 32 to i16*)
ret i16 %1
}
; CHECK-LABEL: am4:
@@ -37,7 +37,7 @@ define i16 @am4() nounwind {
define i16 @am5(i16* %a) nounwind {
%1 = getelementptr i16, i16* %a, i16 2
- %2 = load i16* %1
+ %2 = load i16, i16* %1
ret i16 %2
}
; CHECK-LABEL: am5:
@@ -47,7 +47,7 @@ define i16 @am5(i16* %a) nounwind {
@baz = common global %S zeroinitializer, align 1
define i16 @am6() nounwind {
- %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %1 = load i16, i16* getelementptr (%S* @baz, i32 0, i32 1)
ret i16 %1
}
; CHECK-LABEL: am6:
@@ -59,7 +59,7 @@ define i16 @am6() nounwind {
define i8 @am7(i16 %n) nounwind {
%1 = getelementptr %T, %T* @duh, i32 0, i32 1
%2 = getelementptr [2 x i8], [2 x i8]* %1, i16 0, i16 %n
- %3= load i8* %2
+ %3= load i8, i8* %2
ret i8 %3
}
; CHECK-LABEL: am7:
diff --git a/llvm/test/CodeGen/MSP430/Inst16mi.ll b/llvm/test/CodeGen/MSP430/Inst16mi.ll
index e9ab75cc80b..38c16f2ba23 100644
--- a/llvm/test/CodeGen/MSP430/Inst16mi.ll
+++ b/llvm/test/CodeGen/MSP430/Inst16mi.ll
@@ -14,7 +14,7 @@ define void @mov() nounwind {
define void @add() nounwind {
; CHECK-LABEL: add:
; CHECK: add.w #2, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = add i16 %1, 2
store i16 %2, i16 * @foo
ret void
@@ -23,7 +23,7 @@ define void @add() nounwind {
define void @and() nounwind {
; CHECK-LABEL: and:
; CHECK: and.w #2, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = and i16 %1, 2
store i16 %2, i16 * @foo
ret void
@@ -32,7 +32,7 @@ define void @and() nounwind {
define void @bis() nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.w #2, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = or i16 %1, 2
store i16 %2, i16 * @foo
ret void
@@ -41,7 +41,7 @@ define void @bis() nounwind {
define void @xor() nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.w #2, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = xor i16 %1, 2
store i16 %2, i16 * @foo
ret void
diff --git a/llvm/test/CodeGen/MSP430/Inst16mm.ll b/llvm/test/CodeGen/MSP430/Inst16mm.ll
index 5c93e37bfa9..c75e1beb235 100644
--- a/llvm/test/CodeGen/MSP430/Inst16mm.ll
+++ b/llvm/test/CodeGen/MSP430/Inst16mm.ll
@@ -7,7 +7,7 @@ target triple = "msp430-generic-generic"
define void @mov() nounwind {
; CHECK-LABEL: mov:
; CHECK: mov.w &bar, &foo
- %1 = load i16* @bar
+ %1 = load i16, i16* @bar
store i16 %1, i16* @foo
ret void
}
@@ -15,8 +15,8 @@ define void @mov() nounwind {
define void @add() nounwind {
; CHECK-LABEL: add:
; CHECK: add.w &bar, &foo
- %1 = load i16* @bar
- %2 = load i16* @foo
+ %1 = load i16, i16* @bar
+ %2 = load i16, i16* @foo
%3 = add i16 %2, %1
store i16 %3, i16* @foo
ret void
@@ -25,8 +25,8 @@ define void @add() nounwind {
define void @and() nounwind {
; CHECK-LABEL: and:
; CHECK: and.w &bar, &foo
- %1 = load i16* @bar
- %2 = load i16* @foo
+ %1 = load i16, i16* @bar
+ %2 = load i16, i16* @foo
%3 = and i16 %2, %1
store i16 %3, i16* @foo
ret void
@@ -35,8 +35,8 @@ define void @and() nounwind {
define void @bis() nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.w &bar, &foo
- %1 = load i16* @bar
- %2 = load i16* @foo
+ %1 = load i16, i16* @bar
+ %2 = load i16, i16* @foo
%3 = or i16 %2, %1
store i16 %3, i16* @foo
ret void
@@ -45,8 +45,8 @@ define void @bis() nounwind {
define void @xor() nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.w &bar, &foo
- %1 = load i16* @bar
- %2 = load i16* @foo
+ %1 = load i16, i16* @bar
+ %2 = load i16, i16* @foo
%3 = xor i16 %2, %1
store i16 %3, i16* @foo
ret void
@@ -58,10 +58,10 @@ entry:
%x = alloca i32, align 2 ; <i32*> [#uses=1]
%y = alloca i32, align 2 ; <i32*> [#uses=1]
store i16 0, i16* %retval
- %tmp = load i32* %y ; <i32> [#uses=1]
+ %tmp = load i32, i32* %y ; <i32> [#uses=1]
store i32 %tmp, i32* %x
store i16 0, i16* %retval
- %0 = load i16* %retval ; <i16> [#uses=1]
+ %0 = load i16, i16* %retval ; <i16> [#uses=1]
ret i16 %0
; CHECK-LABEL: mov2:
; CHECK: mov.w 2(r1), 6(r1)
diff --git a/llvm/test/CodeGen/MSP430/Inst16mr.ll b/llvm/test/CodeGen/MSP430/Inst16mr.ll
index 20100489368..50dc4c0b673 100644
--- a/llvm/test/CodeGen/MSP430/Inst16mr.ll
+++ b/llvm/test/CodeGen/MSP430/Inst16mr.ll
@@ -13,7 +13,7 @@ define void @mov(i16 %a) nounwind {
define void @add(i16 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add.w r15, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = add i16 %a, %1
store i16 %2, i16* @foo
ret void
@@ -22,7 +22,7 @@ define void @add(i16 %a) nounwind {
define void @and(i16 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and.w r15, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = and i16 %a, %1
store i16 %2, i16* @foo
ret void
@@ -31,7 +31,7 @@ define void @and(i16 %a) nounwind {
define void @bis(i16 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.w r15, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = or i16 %a, %1
store i16 %2, i16* @foo
ret void
@@ -41,7 +41,7 @@ define void @bic(i16 zeroext %m) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic.w r15, &foo
%1 = xor i16 %m, -1
- %2 = load i16* @foo
+ %2 = load i16, i16* @foo
%3 = and i16 %2, %1
store i16 %3, i16* @foo
ret void
@@ -50,7 +50,7 @@ define void @bic(i16 zeroext %m) nounwind {
define void @xor(i16 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.w r15, &foo
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = xor i16 %a, %1
store i16 %2, i16* @foo
ret void
diff --git a/llvm/test/CodeGen/MSP430/Inst16rm.ll b/llvm/test/CodeGen/MSP430/Inst16rm.ll
index e6c52616c8f..4f6998ee68d 100644
--- a/llvm/test/CodeGen/MSP430/Inst16rm.ll
+++ b/llvm/test/CodeGen/MSP430/Inst16rm.ll
@@ -6,7 +6,7 @@ target triple = "msp430-generic-generic"
define i16 @add(i16 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add.w &foo, r15
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = add i16 %a, %1
ret i16 %2
}
@@ -14,7 +14,7 @@ define i16 @add(i16 %a) nounwind {
define i16 @and(i16 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and.w &foo, r15
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = and i16 %a, %1
ret i16 %2
}
@@ -22,7 +22,7 @@ define i16 @and(i16 %a) nounwind {
define i16 @bis(i16 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.w &foo, r15
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = or i16 %a, %1
ret i16 %2
}
@@ -30,7 +30,7 @@ define i16 @bis(i16 %a) nounwind {
define i16 @bic(i16 %a) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic.w &foo, r15
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = xor i16 %1, -1
%3 = and i16 %a, %2
ret i16 %3
@@ -39,7 +39,7 @@ define i16 @bic(i16 %a) nounwind {
define i16 @xor(i16 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.w &foo, r15
- %1 = load i16* @foo
+ %1 = load i16, i16* @foo
%2 = xor i16 %a, %1
ret i16 %2
}
diff --git a/llvm/test/CodeGen/MSP430/Inst8mi.ll b/llvm/test/CodeGen/MSP430/Inst8mi.ll
index a2c7b71d66d..ff22d7e1eb3 100644
--- a/llvm/test/CodeGen/MSP430/Inst8mi.ll
+++ b/llvm/test/CodeGen/MSP430/Inst8mi.ll
@@ -13,7 +13,7 @@ define void @mov() nounwind {
define void @add() nounwind {
; CHECK-LABEL: add:
; CHECK: add.b #2, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = add i8 %1, 2
store i8 %2, i8 * @foo
ret void
@@ -22,7 +22,7 @@ define void @add() nounwind {
define void @and() nounwind {
; CHECK-LABEL: and:
; CHECK: and.b #2, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = and i8 %1, 2
store i8 %2, i8 * @foo
ret void
@@ -31,7 +31,7 @@ define void @and() nounwind {
define void @bis() nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.b #2, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = or i8 %1, 2
store i8 %2, i8 * @foo
ret void
@@ -40,7 +40,7 @@ define void @bis() nounwind {
define void @xor() nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.b #2, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = xor i8 %1, 2
store i8 %2, i8 * @foo
ret void
diff --git a/llvm/test/CodeGen/MSP430/Inst8mm.ll b/llvm/test/CodeGen/MSP430/Inst8mm.ll
index d1ce8bc66b9..b9848dc1230 100644
--- a/llvm/test/CodeGen/MSP430/Inst8mm.ll
+++ b/llvm/test/CodeGen/MSP430/Inst8mm.ll
@@ -8,7 +8,7 @@ target triple = "msp430-generic-generic"
define void @mov() nounwind {
; CHECK-LABEL: mov:
; CHECK: mov.b &bar, &foo
- %1 = load i8* @bar
+ %1 = load i8, i8* @bar
store i8 %1, i8* @foo
ret void
}
@@ -16,8 +16,8 @@ define void @mov() nounwind {
define void @add() nounwind {
; CHECK-LABEL: add:
; CHECK: add.b &bar, &foo
- %1 = load i8* @bar
- %2 = load i8* @foo
+ %1 = load i8, i8* @bar
+ %2 = load i8, i8* @foo
%3 = add i8 %2, %1
store i8 %3, i8* @foo
ret void
@@ -26,8 +26,8 @@ define void @add() nounwind {
define void @and() nounwind {
; CHECK-LABEL: and:
; CHECK: and.b &bar, &foo
- %1 = load i8* @bar
- %2 = load i8* @foo
+ %1 = load i8, i8* @bar
+ %2 = load i8, i8* @foo
%3 = and i8 %2, %1
store i8 %3, i8* @foo
ret void
@@ -36,8 +36,8 @@ define void @and() nounwind {
define void @bis() nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.b &bar, &foo
- %1 = load i8* @bar
- %2 = load i8* @foo
+ %1 = load i8, i8* @bar
+ %2 = load i8, i8* @foo
%3 = or i8 %2, %1
store i8 %3, i8* @foo
ret void
@@ -46,8 +46,8 @@ define void @bis() nounwind {
define void @xor() nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.b &bar, &foo
- %1 = load i8* @bar
- %2 = load i8* @foo
+ %1 = load i8, i8* @bar
+ %2 = load i8, i8* @foo
%3 = xor i8 %2, %1
store i8 %3, i8* @foo
ret void
diff --git a/llvm/test/CodeGen/MSP430/Inst8mr.ll b/llvm/test/CodeGen/MSP430/Inst8mr.ll
index 0b3566770cf..f03c7e1a659 100644
--- a/llvm/test/CodeGen/MSP430/Inst8mr.ll
+++ b/llvm/test/CodeGen/MSP430/Inst8mr.ll
@@ -13,7 +13,7 @@ define void @mov(i8 %a) nounwind {
define void @and(i8 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and.b r15, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = and i8 %a, %1
store i8 %2, i8* @foo
ret void
@@ -22,7 +22,7 @@ define void @and(i8 %a) nounwind {
define void @add(i8 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add.b r15, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = add i8 %a, %1
store i8 %2, i8* @foo
ret void
@@ -31,7 +31,7 @@ define void @add(i8 %a) nounwind {
define void @bis(i8 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.b r15, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = or i8 %a, %1
store i8 %2, i8* @foo
ret void
@@ -41,7 +41,7 @@ define void @bic(i8 zeroext %m) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic.b r15, &foo
%1 = xor i8 %m, -1
- %2 = load i8* @foo
+ %2 = load i8, i8* @foo
%3 = and i8 %2, %1
store i8 %3, i8* @foo
ret void
@@ -50,7 +50,7 @@ define void @bic(i8 zeroext %m) nounwind {
define void @xor(i8 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.b r15, &foo
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = xor i8 %a, %1
store i8 %2, i8* @foo
ret void
diff --git a/llvm/test/CodeGen/MSP430/Inst8rm.ll b/llvm/test/CodeGen/MSP430/Inst8rm.ll
index 308163ed730..e1a97039557 100644
--- a/llvm/test/CodeGen/MSP430/Inst8rm.ll
+++ b/llvm/test/CodeGen/MSP430/Inst8rm.ll
@@ -6,7 +6,7 @@ target triple = "msp430-generic-generic"
define i8 @add(i8 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add.b &foo, r15
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = add i8 %a, %1
ret i8 %2
}
@@ -14,7 +14,7 @@ define i8 @add(i8 %a) nounwind {
define i8 @and(i8 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and.b &foo, r15
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = and i8 %a, %1
ret i8 %2
}
@@ -22,7 +22,7 @@ define i8 @and(i8 %a) nounwind {
define i8 @bis(i8 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis.b &foo, r15
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = or i8 %a, %1
ret i8 %2
}
@@ -30,7 +30,7 @@ define i8 @bis(i8 %a) nounwind {
define i8 @bic(i8 %a) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic.b &foo, r15
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = xor i8 %1, -1
%3 = and i8 %a, %2
ret i8 %3
@@ -39,7 +39,7 @@ define i8 @bic(i8 %a) nounwind {
define i8 @xor(i8 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor.b &foo, r15
- %1 = load i8* @foo
+ %1 = load i8, i8* @foo
%2 = xor i8 %a, %1
ret i8 %2
}
diff --git a/llvm/test/CodeGen/MSP430/bit.ll b/llvm/test/CodeGen/MSP430/bit.ll
index 2ffc191695f..45964f97f1b 100644
--- a/llvm/test/CodeGen/MSP430/bit.ll
+++ b/llvm/test/CodeGen/MSP430/bit.ll
@@ -33,7 +33,7 @@ define i8 @bitbir(i8 %a) nounwind {
; CHECK: bit.b #15, r15
define i8 @bitbmi() nounwind {
- %t1 = load i8* @foo8
+ %t1 = load i8, i8* @foo8
%t2 = and i8 %t1, 15
%t3 = icmp ne i8 %t2, 0
%t4 = zext i1 %t3 to i8
@@ -43,7 +43,7 @@ define i8 @bitbmi() nounwind {
; CHECK: bit.b #15, &foo8
define i8 @bitbim() nounwind {
- %t1 = load i8* @foo8
+ %t1 = load i8, i8* @foo8
%t2 = and i8 15, %t1
%t3 = icmp ne i8 %t2, 0
%t4 = zext i1 %t3 to i8
@@ -53,7 +53,7 @@ define i8 @bitbim() nounwind {
; CHECK: bit.b #15, &foo8
define i8 @bitbrm(i8 %a) nounwind {
- %t1 = load i8* @foo8
+ %t1 = load i8, i8* @foo8
%t2 = and i8 %a, %t1
%t3 = icmp ne i8 %t2, 0
%t4 = zext i1 %t3 to i8
@@ -63,7 +63,7 @@ define i8 @bitbrm(i8 %a) nounwind {
; CHECK: bit.b &foo8, r15
define i8 @bitbmr(i8 %a) nounwind {
- %t1 = load i8* @foo8
+ %t1 = load i8, i8* @foo8
%t2 = and i8 %t1, %a
%t3 = icmp ne i8 %t2, 0
%t4 = zext i1 %t3 to i8
@@ -73,8 +73,8 @@ define i8 @bitbmr(i8 %a) nounwind {
; CHECK: bit.b r15, &foo8
define i8 @bitbmm() nounwind {
- %t1 = load i8* @foo8
- %t2 = load i8* @bar8
+ %t1 = load i8, i8* @foo8
+ %t2 = load i8, i8* @bar8
%t3 = and i8 %t1, %t2
%t4 = icmp ne i8 %t3, 0
%t5 = zext i1 %t4 to i8
@@ -114,7 +114,7 @@ define i16 @bitwir(i16 %a) nounwind {
; CHECK: bit.w #4080, r15
define i16 @bitwmi() nounwind {
- %t1 = load i16* @foo16
+ %t1 = load i16, i16* @foo16
%t2 = and i16 %t1, 4080
%t3 = icmp ne i16 %t2, 0
%t4 = zext i1 %t3 to i16
@@ -124,7 +124,7 @@ define i16 @bitwmi() nounwind {
; CHECK: bit.w #4080, &foo16
define i16 @bitwim() nounwind {
- %t1 = load i16* @foo16
+ %t1 = load i16, i16* @foo16
%t2 = and i16 4080, %t1
%t3 = icmp ne i16 %t2, 0
%t4 = zext i1 %t3 to i16
@@ -134,7 +134,7 @@ define i16 @bitwim() nounwind {
; CHECK: bit.w #4080, &foo16
define i16 @bitwrm(i16 %a) nounwind {
- %t1 = load i16* @foo16
+ %t1 = load i16, i16* @foo16
%t2 = and i16 %a, %t1
%t3 = icmp ne i16 %t2, 0
%t4 = zext i1 %t3 to i16
@@ -144,7 +144,7 @@ define i16 @bitwrm(i16 %a) nounwind {
; CHECK: bit.w &foo16, r15
define i16 @bitwmr(i16 %a) nounwind {
- %t1 = load i16* @foo16
+ %t1 = load i16, i16* @foo16
%t2 = and i16 %t1, %a
%t3 = icmp ne i16 %t2, 0
%t4 = zext i1 %t3 to i16
@@ -154,8 +154,8 @@ define i16 @bitwmr(i16 %a) nounwind {
; CHECK: bit.w r15, &foo16
define i16 @bitwmm() nounwind {
- %t1 = load i16* @foo16
- %t2 = load i16* @bar16
+ %t1 = load i16, i16* @foo16
+ %t2 = load i16, i16* @bar16
%t3 = and i16 %t1, %t2
%t4 = icmp ne i16 %t3, 0
%t5 = zext i1 %t4 to i16
diff --git a/llvm/test/CodeGen/MSP430/byval.ll b/llvm/test/CodeGen/MSP430/byval.ll
index 3be05b56a0e..410a6b047b6 100644
--- a/llvm/test/CodeGen/MSP430/byval.ll
+++ b/llvm/test/CodeGen/MSP430/byval.ll
@@ -11,7 +11,7 @@ entry:
; CHECK-LABEL: callee:
; CHECK: mov.w 2(r1), r15
%0 = getelementptr inbounds %struct.Foo, %struct.Foo* %f, i32 0, i32 0
- %1 = load i16* %0, align 2
+ %1 = load i16, i16* %0, align 2
ret i16 %1
}
diff --git a/llvm/test/CodeGen/MSP430/indirectbr.ll b/llvm/test/CodeGen/MSP430/indirectbr.ll
index 4816c4ac3a1..af1a466b3c7 100644
--- a/llvm/test/CodeGen/MSP430/indirectbr.ll
+++ b/llvm/test/CodeGen/MSP430/indirectbr.ll
@@ -5,7 +5,7 @@
define internal i16 @foo(i16 %i) nounwind {
entry:
- %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
+ %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2]
%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
br i1 %1, label %bb3, label %bb2
@@ -15,7 +15,7 @@ bb2: ; preds = %bb3, %entry
bb3: ; preds = %entry
%2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i16 0, i16 %i ; <i8**> [#uses=1]
- %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
+ %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1]
br label %bb2
L5: ; preds = %bb2
diff --git a/llvm/test/CodeGen/MSP430/indirectbr2.ll b/llvm/test/CodeGen/MSP430/indirectbr2.ll
index 796687ebe2b..b0b4f1cbfd2 100644
--- a/llvm/test/CodeGen/MSP430/indirectbr2.ll
+++ b/llvm/test/CodeGen/MSP430/indirectbr2.ll
@@ -4,7 +4,7 @@
define internal i16 @foo(i16 %i) nounwind {
entry:
%tmp1 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i16 0, i16 %i ; <i8**> [#uses=1]
- %gotovar.4.0 = load i8** %tmp1, align 4 ; <i8*> [#uses=1]
+ %gotovar.4.0 = load i8*, i8** %tmp1, align 4 ; <i8*> [#uses=1]
; CHECK: br .LC.0.2070(r12)
indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
diff --git a/llvm/test/CodeGen/MSP430/inline-asm.ll b/llvm/test/CodeGen/MSP430/inline-asm.ll
index 0e7886a4721..f4d62924ea3 100644
--- a/llvm/test/CodeGen/MSP430/inline-asm.ll
+++ b/llvm/test/CodeGen/MSP430/inline-asm.ll
@@ -20,7 +20,7 @@ define void @immmem() nounwind {
}
define void @mem() nounwind {
- %fooval = load i16* @foo
+ %fooval = load i16, i16* @foo
call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
ret void
}
diff --git a/llvm/test/CodeGen/MSP430/jumptable.ll b/llvm/test/CodeGen/MSP430/jumptable.ll
index 239d79ed9cb..4ba930b04e3 100644
--- a/llvm/test/CodeGen/MSP430/jumptable.ll
+++ b/llvm/test/CodeGen/MSP430/jumptable.ll
@@ -10,7 +10,7 @@ entry:
%retval = alloca i16, align 2
%i.addr = alloca i16, align 2
store i16 %i, i16* %i.addr, align 2
- %0 = load i16* %i.addr, align 2
+ %0 = load i16, i16* %i.addr, align 2
; CHECK: mov.w #2, r14
; CHECK: call #__mulhi3hw_noint
; CHECK: br .LJTI0_0(r15)
@@ -42,7 +42,7 @@ sw.default: ; preds = %entry
br label %return
return: ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
- %1 = load i16* %retval
+ %1 = load i16, i16* %retval
ret i16 %1
; CHECK: ret
}
diff --git a/llvm/test/CodeGen/MSP430/memset.ll b/llvm/test/CodeGen/MSP430/memset.ll
index bf105446f52..76cfb29586d 100644
--- a/llvm/test/CodeGen/MSP430/memset.ll
+++ b/llvm/test/CodeGen/MSP430/memset.ll
@@ -8,7 +8,7 @@ target triple = "msp430---elf"
define void @test() nounwind {
entry:
; CHECK-LABEL: test:
- %0 = load i8** @buf, align 2
+ %0 = load i8*, i8** @buf, align 2
; CHECK: mov.w &buf, r15
; CHECK-NEXT: mov.w #5, r14
; CHECK-NEXT: mov.w #128, r13
diff --git a/llvm/test/CodeGen/MSP430/misched-msp430.ll b/llvm/test/CodeGen/MSP430/misched-msp430.ll
index c8541eff583..3d18fa005a6 100644
--- a/llvm/test/CodeGen/MSP430/misched-msp430.ll
+++ b/llvm/test/CodeGen/MSP430/misched-msp430.ll
@@ -14,7 +14,7 @@ target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
; CHECK: ret
define void @f() {
entry:
- %0 = load i16* @y, align 2
+ %0 = load i16, i16* @y, align 2
store i16 %0, i16* @x, align 2
ret void
}
diff --git a/llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll b/llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
index 342afed6605..a4fea623116 100644
--- a/llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
+++ b/llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
@@ -33,10 +33,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r,<r"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* %in1, align 2
+ %tmp1 = load i16, i16* %in1, align 2
%1 = call i16 asm "foo $1,$0", "=r,r<"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
ret void
@@ -48,10 +48,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r,>r"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* %in1, align 2
+ %tmp1 = load i16, i16* %in1, align 2
%1 = call i16 asm "foo $1,$0", "=r,r>"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
ret void
@@ -63,7 +63,7 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r,r"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
ret void
@@ -120,10 +120,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* @min1, align 2
+ %tmp1 = load i16, i16* @min1, align 2
%1 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
%2 = call i16 asm "foo $1,$0", "=r,imr"(i16 1) nounwind
@@ -137,10 +137,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* @min1, align 2
+ %tmp1 = load i16, i16* @min1, align 2
%1 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
%2 = call i16 asm "foo $1,$0", "=r,X"(i16 1) nounwind
@@ -166,7 +166,7 @@ entry:
define void @multi_m() nounwind {
entry:
- %tmp = load i16* @min1, align 2
+ %tmp = load i16, i16* @min1, align 2
call void asm "foo $1,$0", "=*m|r,m|r"(i16* @mout0, i16 %tmp) nounwind
ret void
}
@@ -191,10 +191,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r|r,r|<r"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* %in1, align 2
+ %tmp1 = load i16, i16* %in1, align 2
%1 = call i16 asm "foo $1,$0", "=r|r,r|r<"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
ret void
@@ -206,10 +206,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r|r,r|>r"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* %in1, align 2
+ %tmp1 = load i16, i16* %in1, align 2
%1 = call i16 asm "foo $1,$0", "=r|r,r|r>"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
ret void
@@ -221,7 +221,7 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r|r,r|m"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
ret void
@@ -278,10 +278,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* @min1, align 2
+ %tmp1 = load i16, i16* @min1, align 2
%1 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
%2 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 1) nounwind
@@ -295,10 +295,10 @@ entry:
%in1 = alloca i16, align 2
store i16 0, i16* %out0, align 2
store i16 1, i16* %in1, align 2
- %tmp = load i16* %in1, align 2
+ %tmp = load i16, i16* %in1, align 2
%0 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp) nounwind
store i16 %0, i16* %out0, align 2
- %tmp1 = load i16* @min1, align 2
+ %tmp1 = load i16, i16* @min1, align 2
%1 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp1) nounwind
store i16 %1, i16* %out0, align 2
%2 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 1) nounwind
diff --git a/llvm/test/CodeGen/MSP430/postinc.ll b/llvm/test/CodeGen/MSP430/postinc.ll
index ee5cef8cdd6..75a927f33fc 100644
--- a/llvm/test/CodeGen/MSP430/postinc.ll
+++ b/llvm/test/CodeGen/MSP430/postinc.ll
@@ -13,7 +13,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
; CHECK-LABEL: add:
; CHECK: add.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
%add = add i16 %tmp4, %sum.09 ; <i16> [#uses=2]
%inc = add i16 %i.010, 1 ; <i16> [#uses=2]
%exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
@@ -35,7 +35,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
; CHECK-LABEL: sub:
; CHECK: sub.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
%add = sub i16 %tmp4, %sum.09 ; <i16> [#uses=2]
%inc = add i16 %i.010, 1 ; <i16> [#uses=2]
%exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
@@ -57,7 +57,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
; CHECK-LABEL: or:
; CHECK: bis.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
%add = or i16 %tmp4, %sum.09 ; <i16> [#uses=2]
%inc = add i16 %i.010, 1 ; <i16> [#uses=2]
%exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
@@ -79,7 +79,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
; CHECK-LABEL: xor:
; CHECK: xor.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
%add = xor i16 %tmp4, %sum.09 ; <i16> [#uses=2]
%inc = add i16 %i.010, 1 ; <i16> [#uses=2]
%exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
@@ -101,7 +101,7 @@ for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr i16, i16* %a, i16 %i.010 ; <i16*> [#uses=1]
; CHECK-LABEL: and:
; CHECK: and.w @r{{[0-9]+}}+, r{{[0-9]+}}
- %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %tmp4 = load i16, i16* %arrayidx ; <i16> [#uses=1]
%add = and i16 %tmp4, %sum.09 ; <i16> [#uses=2]
%inc = add i16 %i.010, 1 ; <i16> [#uses=2]
%exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
OpenPOWER on IntegriCloud