diff options
Diffstat (limited to 'llvm/test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir | 173 |
1 files changed, 0 insertions, 173 deletions
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir b/llvm/test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir deleted file mode 100644 index af71086e542..00000000000 --- a/llvm/test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir +++ /dev/null @@ -1,173 +0,0 @@ -# RUN: llc -march=amdgcn -run-pass si-insert-waits %s -o - | FileCheck %s - ---- | - define void @basic_insert_dcache_wb() { - ret void - } - - define void @explicit_flush_after() { - ret void - } - - define void @explicit_flush_before() { - ret void - } - - define void @no_scalar_store() { - ret void - } - - define void @multi_block_store() { - bb0: - br i1 undef, label %bb1, label %bb2 - - bb1: - ret void - - bb2: - ret void - } - - define void @one_block_store() { - bb0: - br i1 undef, label %bb1, label %bb2 - - bb1: - ret void - - bb2: - ret void - } - - define amdgpu_ps float @si_return() { - ret float undef - } - -... ---- -# CHECK-LABEL: name: basic_insert_dcache_wb -# CHECK: bb.0: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -name: basic_insert_dcache_wb -tracksRegLiveness: false - -body: | - bb.0: - S_STORE_DWORD_SGPR undef %sgpr2, undef %sgpr0_sgpr1, undef %m0, 0 - S_ENDPGM -... ---- -# Already has an explicitly requested flush after the last store. -# CHECK-LABEL: name: explicit_flush_after -# CHECK: bb.0: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -name: explicit_flush_after -tracksRegLiveness: false - -body: | - bb.0: - S_STORE_DWORD_SGPR undef %sgpr2, undef %sgpr0_sgpr1, undef %m0, 0 - S_DCACHE_WB - S_ENDPGM -... ---- -# Already has an explicitly requested flush before the last store. -# CHECK-LABEL: name: explicit_flush_before -# CHECK: bb.0: -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -name: explicit_flush_before -tracksRegLiveness: false - -body: | - bb.0: - S_DCACHE_WB - S_STORE_DWORD_SGPR undef %sgpr2, undef %sgpr0_sgpr1, undef %m0, 0 - S_ENDPGM -... ---- -# CHECK-LABEL: no_scalar_store -# CHECK: bb.0 -# CHECK-NEXT: S_ENDPGM -name: no_scalar_store -tracksRegLiveness: false - -body: | - bb.0: - S_ENDPGM -... - -# CHECK-LABEL: name: multi_block_store -# CHECK: bb.0: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -# CHECK: bb.1: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -name: multi_block_store -tracksRegLiveness: false - -body: | - bb.0: - S_STORE_DWORD_SGPR undef %sgpr2, undef %sgpr0_sgpr1, undef %m0, 0 - S_ENDPGM - - bb.1: - S_STORE_DWORD_SGPR undef %sgpr4, undef %sgpr6_sgpr7, undef %m0, 0 - S_ENDPGM -... -... - -# This one should be able to omit the flush in the storeless block but -# this isn't handled now. - -# CHECK-LABEL: name: one_block_store -# CHECK: bb.0: -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -# CHECK: bb.1: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: S_ENDPGM - -name: one_block_store -tracksRegLiveness: false - -body: | - bb.0: - S_ENDPGM - - bb.1: - S_STORE_DWORD_SGPR undef %sgpr4, undef %sgpr6_sgpr7, undef %m0, 0 - S_ENDPGM -... ---- -# CHECK-LABEL: name: si_return -# CHECK: bb.0: -# CHECK-NEXT: S_STORE_DWORD -# CHECK-NEXT: S_WAITCNT -# CHECK-NEXT: S_DCACHE_WB -# CHECK-NEXT: SI_RETURN - -name: si_return -tracksRegLiveness: false - -body: | - bb.0: - S_STORE_DWORD_SGPR undef %sgpr2, undef %sgpr0_sgpr1, undef %m0, 0 - SI_RETURN undef %vgpr0 -... |

