summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Hexagon
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/Hexagon')
-rw-r--r--llvm/test/CodeGen/Hexagon/sdr-reg-profit.ll2
-rw-r--r--llvm/test/CodeGen/Hexagon/swp-phi-ref.ll5
2 files changed, 5 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/sdr-reg-profit.ll b/llvm/test/CodeGen/Hexagon/sdr-reg-profit.ll
index 4d5da5c59c4..9549d7897fc 100644
--- a/llvm/test/CodeGen/Hexagon/sdr-reg-profit.ll
+++ b/llvm/test/CodeGen/Hexagon/sdr-reg-profit.ll
@@ -1,3 +1,5 @@
+; XFAIL: *
+; This requires further patches.
; RUN: llc -march=hexagon < %s | FileCheck %s
;
; Split all andp/orp instructions (by boosting the profitability of their
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll b/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
index 5bfe453406b..d39252141d2 100644
--- a/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
@@ -8,9 +8,10 @@
; correct value. We need to do this even if we haven't generated the
; kernel code for the other Phi yet.
-; CHECK: [[REG0:(v[0-9]+)]] = [[REG1:(v[0-9]+)]]
+; CHECK: v[[REG0:[0-9]+]] = v[[REG1:[0-9]+]]
; CHECK: loop0
-; CHECK: [[REG0]] = [[REG1]]
+; Check for copy REG0 = REG1 (via vcombine):
+; CHECK: v{{[0-9]+}}:[[REG0]] = vcombine(v{{[0-9]+}},v[[REG1]])
; CHECK: endloop0
; Function Attrs: nounwind
OpenPOWER on IntegriCloud