summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Hexagon
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/Hexagon')
-rw-r--r--llvm/test/CodeGen/Hexagon/absaddr-store.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/absimm.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/always-ext.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/compound.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/static.ll1
-rw-r--r--llvm/test/CodeGen/Hexagon/zextloadi1.ll1
6 files changed, 6 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/absaddr-store.ll b/llvm/test/CodeGen/Hexagon/absaddr-store.ll
index dac8607d88d..f4e97d22e7d 100644
--- a/llvm/test/CodeGen/Hexagon/absaddr-store.ll
+++ b/llvm/test/CodeGen/Hexagon/absaddr-store.ll
@@ -1,5 +1,6 @@
; RUN: llc -march=hexagon -hexagon-small-data-threshold=0 < %s | FileCheck %s
; Check that we generate load instructions with absolute addressing mode.
+; XFAIL: *
@a0 = external global i32
@a1 = external global i32
diff --git a/llvm/test/CodeGen/Hexagon/absimm.ll b/llvm/test/CodeGen/Hexagon/absimm.ll
index e67af5e8fef..f3f10f2b4f2 100644
--- a/llvm/test/CodeGen/Hexagon/absimm.ll
+++ b/llvm/test/CodeGen/Hexagon/absimm.ll
@@ -1,6 +1,7 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we generate absolute addressing mode instructions
; with immediate value.
+; XFAIL: *
define i32 @f1(i32 %i) nounwind {
; CHECK: memw(##786432){{ *}}={{ *}}r{{[0-9]+}}
diff --git a/llvm/test/CodeGen/Hexagon/always-ext.ll b/llvm/test/CodeGen/Hexagon/always-ext.ll
index 3bf465b6a51..761c1bd7ba1 100644
--- a/llvm/test/CodeGen/Hexagon/always-ext.ll
+++ b/llvm/test/CodeGen/Hexagon/always-ext.ll
@@ -1,4 +1,5 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
+; XFAIL: *
; Check that we don't generate an invalid packet with too many instructions
; due to a store that has a must-extend operand.
diff --git a/llvm/test/CodeGen/Hexagon/compound.ll b/llvm/test/CodeGen/Hexagon/compound.ll
index f8d36b8b77d..55dc661086b 100644
--- a/llvm/test/CodeGen/Hexagon/compound.ll
+++ b/llvm/test/CodeGen/Hexagon/compound.ll
@@ -1,4 +1,5 @@
; RUN: llc -march=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+; XFAIL: *
; CHECK: p0 = cmp.gt(r0,#-1); if (!p0.new) jump:nt
diff --git a/llvm/test/CodeGen/Hexagon/static.ll b/llvm/test/CodeGen/Hexagon/static.ll
index 760b8b55972..6adfaaf139e 100644
--- a/llvm/test/CodeGen/Hexagon/static.ll
+++ b/llvm/test/CodeGen/Hexagon/static.ll
@@ -1,4 +1,5 @@
; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched -disable-hexagon-misched < %s | FileCheck %s
+; XFAIL: *
@num = external global i32
@acc = external global i32
diff --git a/llvm/test/CodeGen/Hexagon/zextloadi1.ll b/llvm/test/CodeGen/Hexagon/zextloadi1.ll
index 9ce7bea9fce..c6c982750c0 100644
--- a/llvm/test/CodeGen/Hexagon/zextloadi1.ll
+++ b/llvm/test/CodeGen/Hexagon/zextloadi1.ll
@@ -1,4 +1,5 @@
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; XFAIL: *
; CHECK: r{{[0-9]+}} = ##i129_l+16
; CHECK: r{{[0-9]+}} = ##i129_s+16
OpenPOWER on IntegriCloud