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-rw-r--r--llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
index 5575f630fe1..f446b63bf53 100644
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
@@ -11,9 +11,11 @@
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon"
-define void @fred() #0 {
+@g0 = global <8 x i16> zeroinitializer, align 2
+
+define i32 @fred() #0 {
b0:
- %v1 = load <8 x i16>, <8 x i16>* undef, align 2
+ %v1 = load <8 x i16>, <8 x i16>* @g0, align 2
%v2 = icmp sgt <8 x i16> %v1, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>
%v3 = zext <8 x i1> %v2 to <8 x i32>
%v4 = add nuw nsw <8 x i32> zeroinitializer, %v3
@@ -28,10 +30,10 @@ b0:
br i1 %v12, label %b13, label %b14
b13: ; preds = %b0
- unreachable
+ ret i32 %v11
b14: ; preds = %b0
- ret void
+ ret i32 0
}
attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
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