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-rw-r--r--llvm/test/CodeGen/CellSPU/fneg-fabs.ll2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll
index 1abdcf6a34d..a183483cded 100644
--- a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll
+++ b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll
@@ -4,6 +4,8 @@
; RUN: grep xor %t1.s | count 4 &&
; RUN: grep and %t1.s | count 5 &&
; RUN: grep andbi %t1.s | count 3
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
define double @fneg_dp(double %X) {
%Y = sub double -0.000000e+00, %X
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