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-rw-r--r--llvm/test/CodeGen/ARM/sadd_sat.ll218
-rw-r--r--llvm/test/CodeGen/ARM/sadd_sat_plus.ll269
-rw-r--r--llvm/test/CodeGen/ARM/ssub_sat.ll230
-rw-r--r--llvm/test/CodeGen/ARM/ssub_sat_plus.ll250
-rw-r--r--llvm/test/CodeGen/ARM/uadd_sat.ll80
-rw-r--r--llvm/test/CodeGen/ARM/uadd_sat_plus.ll125
-rw-r--r--llvm/test/CodeGen/ARM/usub_sat.ll94
-rw-r--r--llvm/test/CodeGen/ARM/usub_sat_plus.ll116
8 files changed, 560 insertions, 822 deletions
diff --git a/llvm/test/CodeGen/ARM/sadd_sat.ll b/llvm/test/CodeGen/ARM/sadd_sat.ll
index e3d329c6a9d..e56bd420bb5 100644
--- a/llvm/test/CodeGen/ARM/sadd_sat.ll
+++ b/llvm/test/CodeGen/ARM/sadd_sat.ll
@@ -210,67 +210,51 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r3, r1, #16
-; CHECK-T1-NEXT: lsls r1, r0, #16
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB2_2
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: blt .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB2_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: ldr r1, .LCPI2_1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB2_5
-; CHECK-T1-NEXT: b .LBB2_6
+; CHECK-T1-NEXT: bgt .LBB2_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI2_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB2_6
-; CHECK-T1-NEXT: .LBB2_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB2_6:
-; CHECK-T1-NEXT: asrs r0, r0, #16
; CHECK-T1-NEXT: bx lr
; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
+; CHECK-T1-NEXT: @ %bb.5:
; CHECK-T1-NEXT: .LCPI2_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: .long 32767 @ 0x7fff
+; CHECK-T1-NEXT: .LCPI2_1:
+; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #16
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #16
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #16
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #16
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: movw r1, #32767
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it lt
+; CHECK-T2-NEXT: movlt r1, r0
+; CHECK-T2-NEXT: movw r0, #32768
+; CHECK-T2-NEXT: cmn.w r1, #32768
+; CHECK-T2-NEXT: movt r0, #65535
+; CHECK-T2-NEXT: it gt
+; CHECK-T2-NEXT: movgt r0, r1
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #16
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #16
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #16
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #16
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: movw r1, #32767
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movlt r1, r0
+; CHECK-ARM-NEXT: movw r0, #32768
+; CHECK-ARM-NEXT: movt r0, #65535
+; CHECK-ARM-NEXT: cmn r1, #32768
+; CHECK-ARM-NEXT: movgt r0, r1
; CHECK-ARM-NEXT: bx lr
%tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)
ret i16 %tmp
@@ -279,67 +263,39 @@ define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r3, r1, #24
-; CHECK-T1-NEXT: lsls r1, r0, #24
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB3_2
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #127
+; CHECK-T1-NEXT: cmp r0, #127
+; CHECK-T1-NEXT: blt .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB3_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: mvns r1, r1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB3_5
-; CHECK-T1-NEXT: b .LBB3_6
+; CHECK-T1-NEXT: bgt .LBB3_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI3_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB3_6
-; CHECK-T1-NEXT: .LBB3_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB3_6:
-; CHECK-T1-NEXT: asrs r0, r0, #24
; CHECK-T1-NEXT: bx lr
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI3_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #24
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #24
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #24
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #24
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: cmp r0, #127
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #127
+; CHECK-T2-NEXT: cmn.w r0, #128
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #127
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #24
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #24
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #24
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #24
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #127
+; CHECK-ARM-NEXT: movge r0, #127
+; CHECK-ARM-NEXT: cmn r0, #128
+; CHECK-ARM-NEXT: mvnle r0, #127
; CHECK-ARM-NEXT: bx lr
%tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y)
ret i8 %tmp
@@ -348,67 +304,39 @@ define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; CHECK-T1-LABEL: func3:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r3, r1, #28
-; CHECK-T1-NEXT: lsls r1, r0, #28
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB4_2
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #7
+; CHECK-T1-NEXT: cmp r0, #7
+; CHECK-T1-NEXT: blt .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB4_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: mvns r1, r1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB4_5
-; CHECK-T1-NEXT: b .LBB4_6
+; CHECK-T1-NEXT: bgt .LBB4_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI4_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB4_6
-; CHECK-T1-NEXT: .LBB4_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB4_6:
-; CHECK-T1-NEXT: asrs r0, r0, #28
; CHECK-T1-NEXT: bx lr
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI4_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
;
; CHECK-T2-LABEL: func3:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #28
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #28
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #28
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #28
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: cmp r0, #7
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #7
+; CHECK-T2-NEXT: cmn.w r0, #8
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #7
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func3:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #28
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #28
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #28
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #28
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #7
+; CHECK-ARM-NEXT: movge r0, #7
+; CHECK-ARM-NEXT: cmn r0, #8
+; CHECK-ARM-NEXT: mvnle r0, #7
; CHECK-ARM-NEXT: bx lr
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y)
ret i4 %tmp
diff --git a/llvm/test/CodeGen/ARM/sadd_sat_plus.ll b/llvm/test/CodeGen/ARM/sadd_sat_plus.ll
index 8d41eb6685d..94aca12a78b 100644
--- a/llvm/test/CodeGen/ARM/sadd_sat_plus.ll
+++ b/llvm/test/CodeGen/ARM/sadd_sat_plus.ll
@@ -217,69 +217,70 @@ define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounw
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r3, r1, #16
-; CHECK-T1-NEXT: lsls r1, r0, #16
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB2_2
+; CHECK-T1-NEXT: sxth r1, r1
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: blt .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB2_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: ldr r1, .LCPI2_1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB2_5
-; CHECK-T1-NEXT: b .LBB2_6
+; CHECK-T1-NEXT: bgt .LBB2_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI2_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB2_6
-; CHECK-T1-NEXT: .LBB2_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB2_6:
-; CHECK-T1-NEXT: asrs r0, r0, #16
; CHECK-T1-NEXT: bx lr
; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
+; CHECK-T1-NEXT: @ %bb.5:
; CHECK-T1-NEXT: .LCPI2_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: .long 32767 @ 0x7fff
+; CHECK-T1-NEXT: .LCPI2_1:
+; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
;
-; CHECK-T2-LABEL: func16:
-; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #16
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #16
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #16
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #16
-; CHECK-T2-NEXT: bx lr
+; CHECK-T2NODSP-LABEL: func16:
+; CHECK-T2NODSP: @ %bb.0:
+; CHECK-T2NODSP-NEXT: muls r1, r2, r1
+; CHECK-T2NODSP-NEXT: sxth r1, r1
+; CHECK-T2NODSP-NEXT: add r0, r1
+; CHECK-T2NODSP-NEXT: movw r1, #32767
+; CHECK-T2NODSP-NEXT: cmp r0, r1
+; CHECK-T2NODSP-NEXT: it lt
+; CHECK-T2NODSP-NEXT: movlt r1, r0
+; CHECK-T2NODSP-NEXT: movw r0, #32768
+; CHECK-T2NODSP-NEXT: movt r0, #65535
+; CHECK-T2NODSP-NEXT: cmn.w r1, #32768
+; CHECK-T2NODSP-NEXT: it gt
+; CHECK-T2NODSP-NEXT: movgt r0, r1
+; CHECK-T2NODSP-NEXT: bx lr
+;
+; CHECK-T2DSP-LABEL: func16:
+; CHECK-T2DSP: @ %bb.0:
+; CHECK-T2DSP-NEXT: muls r1, r2, r1
+; CHECK-T2DSP-NEXT: sxtah r0, r0, r1
+; CHECK-T2DSP-NEXT: movw r1, #32767
+; CHECK-T2DSP-NEXT: cmp r0, r1
+; CHECK-T2DSP-NEXT: it lt
+; CHECK-T2DSP-NEXT: movlt r1, r0
+; CHECK-T2DSP-NEXT: movw r0, #32768
+; CHECK-T2DSP-NEXT: cmn.w r1, #32768
+; CHECK-T2DSP-NEXT: movt r0, #65535
+; CHECK-T2DSP-NEXT: it gt
+; CHECK-T2DSP-NEXT: movgt r0, r1
+; CHECK-T2DSP-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #16
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #16
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #16
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #16
+; CHECK-ARM-NEXT: sxtah r0, r0, r1
+; CHECK-ARM-NEXT: movw r1, #32767
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movlt r1, r0
+; CHECK-ARM-NEXT: movw r0, #32768
+; CHECK-ARM-NEXT: movt r0, #65535
+; CHECK-ARM-NEXT: cmn r1, #32768
+; CHECK-ARM-NEXT: movgt r0, r1
; CHECK-ARM-NEXT: bx lr
%a = mul i16 %y, %z
%tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)
@@ -290,69 +291,55 @@ define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r3, r1, #24
-; CHECK-T1-NEXT: lsls r1, r0, #24
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB3_2
+; CHECK-T1-NEXT: sxtb r1, r1
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #127
+; CHECK-T1-NEXT: cmp r0, #127
+; CHECK-T1-NEXT: blt .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB3_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: mvns r1, r1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB3_5
-; CHECK-T1-NEXT: b .LBB3_6
+; CHECK-T1-NEXT: bgt .LBB3_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI3_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB3_6
-; CHECK-T1-NEXT: .LBB3_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB3_6:
-; CHECK-T1-NEXT: asrs r0, r0, #24
; CHECK-T1-NEXT: bx lr
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI3_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
;
-; CHECK-T2-LABEL: func8:
-; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #24
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #24
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #24
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #24
-; CHECK-T2-NEXT: bx lr
+; CHECK-T2NODSP-LABEL: func8:
+; CHECK-T2NODSP: @ %bb.0:
+; CHECK-T2NODSP-NEXT: muls r1, r2, r1
+; CHECK-T2NODSP-NEXT: sxtb r1, r1
+; CHECK-T2NODSP-NEXT: add r0, r1
+; CHECK-T2NODSP-NEXT: cmp r0, #127
+; CHECK-T2NODSP-NEXT: it ge
+; CHECK-T2NODSP-NEXT: movge r0, #127
+; CHECK-T2NODSP-NEXT: cmn.w r0, #128
+; CHECK-T2NODSP-NEXT: it le
+; CHECK-T2NODSP-NEXT: mvnle r0, #127
+; CHECK-T2NODSP-NEXT: bx lr
+;
+; CHECK-T2DSP-LABEL: func8:
+; CHECK-T2DSP: @ %bb.0:
+; CHECK-T2DSP-NEXT: muls r1, r2, r1
+; CHECK-T2DSP-NEXT: sxtab r0, r0, r1
+; CHECK-T2DSP-NEXT: cmp r0, #127
+; CHECK-T2DSP-NEXT: it ge
+; CHECK-T2DSP-NEXT: movge r0, #127
+; CHECK-T2DSP-NEXT: cmn.w r0, #128
+; CHECK-T2DSP-NEXT: it le
+; CHECK-T2DSP-NEXT: mvnle r0, #127
+; CHECK-T2DSP-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #24
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #24
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #24
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #24
+; CHECK-ARM-NEXT: sxtab r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #127
+; CHECK-ARM-NEXT: movge r0, #127
+; CHECK-ARM-NEXT: cmn r0, #128
+; CHECK-ARM-NEXT: mvnle r0, #127
; CHECK-ARM-NEXT: bx lr
%a = mul i8 %y, %z
%tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %a)
@@ -363,69 +350,45 @@ define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; CHECK-T1-LABEL: func4:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r3, r1, #28
-; CHECK-T1-NEXT: lsls r1, r0, #28
-; CHECK-T1-NEXT: movs r2, #1
-; CHECK-T1-NEXT: adds r0, r1, r3
-; CHECK-T1-NEXT: mov r3, r2
-; CHECK-T1-NEXT: bmi .LBB4_2
+; CHECK-T1-NEXT: lsls r1, r1, #28
+; CHECK-T1-NEXT: asrs r1, r1, #28
+; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #7
+; CHECK-T1-NEXT: cmp r0, #7
+; CHECK-T1-NEXT: blt .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r3, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: cmp r3, #0
-; CHECK-T1-NEXT: bne .LBB4_4
-; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r2, r2, #31
+; CHECK-T1-NEXT: mvns r1, r1
; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvs .LBB4_5
-; CHECK-T1-NEXT: b .LBB4_6
+; CHECK-T1-NEXT: bgt .LBB4_4
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_4:
-; CHECK-T1-NEXT: ldr r2, .LCPI4_0
-; CHECK-T1-NEXT: cmp r0, r1
-; CHECK-T1-NEXT: bvc .LBB4_6
-; CHECK-T1-NEXT: .LBB4_5:
-; CHECK-T1-NEXT: mov r0, r2
-; CHECK-T1-NEXT: .LBB4_6:
-; CHECK-T1-NEXT: asrs r0, r0, #28
; CHECK-T1-NEXT: bx lr
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI4_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
;
; CHECK-T2-LABEL: func4:
; CHECK-T2: @ %bb.0:
; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #28
-; CHECK-T2-NEXT: mov.w r3, #-2147483648
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #28
-; CHECK-T2-NEXT: movs r2, #0
-; CHECK-T2-NEXT: cmp r1, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r2, #1
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r3, #-2147483648
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #28
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r3, r1
-; CHECK-T2-NEXT: asrs r0, r3, #28
+; CHECK-T2-NEXT: lsls r1, r1, #28
+; CHECK-T2-NEXT: add.w r0, r0, r1, asr #28
+; CHECK-T2-NEXT: cmp r0, #7
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #7
+; CHECK-T2-NEXT: cmn.w r0, #8
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #7
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func4:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #28
-; CHECK-ARM-NEXT: mov r3, #-2147483648
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #28
-; CHECK-ARM-NEXT: mov r2, #0
-; CHECK-ARM-NEXT: cmp r1, #0
-; CHECK-ARM-NEXT: movwmi r2, #1
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: mvnne r3, #-2147483648
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #28
-; CHECK-ARM-NEXT: movvc r3, r1
-; CHECK-ARM-NEXT: asr r0, r3, #28
+; CHECK-ARM-NEXT: lsl r1, r1, #28
+; CHECK-ARM-NEXT: add r0, r0, r1, asr #28
+; CHECK-ARM-NEXT: cmp r0, #7
+; CHECK-ARM-NEXT: movge r0, #7
+; CHECK-ARM-NEXT: cmn r0, #8
+; CHECK-ARM-NEXT: mvnle r0, #7
; CHECK-ARM-NEXT: bx lr
%a = mul i4 %y, %z
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
diff --git a/llvm/test/CodeGen/ARM/ssub_sat.ll b/llvm/test/CodeGen/ARM/ssub_sat.ll
index c6305cec4d3..93be348d80a 100644
--- a/llvm/test/CodeGen/ARM/ssub_sat.ll
+++ b/llvm/test/CodeGen/ARM/ssub_sat.ll
@@ -212,69 +212,51 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r2, r0, #16
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB2_2
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: blt .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB2_4
+; CHECK-T1-NEXT: ldr r1, .LCPI2_1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB2_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB2_5
-; CHECK-T1-NEXT: b .LBB2_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI2_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB2_6
-; CHECK-T1-NEXT: .LBB2_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB2_6:
-; CHECK-T1-NEXT: asrs r0, r0, #16
-; CHECK-T1-NEXT: pop {r4, pc}
+; CHECK-T1-NEXT: bx lr
; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
+; CHECK-T1-NEXT: @ %bb.5:
; CHECK-T1-NEXT: .LCPI2_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: .long 32767 @ 0x7fff
+; CHECK-T1-NEXT: .LCPI2_1:
+; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #16
-; CHECK-T2-NEXT: sub.w r12, r0, r1, lsl #16
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: cmp.w r12, #0
-; CHECK-T2-NEXT: mov.w r2, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r2, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #16
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r2, r12
-; CHECK-T2-NEXT: asrs r0, r2, #16
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: movw r1, #32767
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it lt
+; CHECK-T2-NEXT: movlt r1, r0
+; CHECK-T2-NEXT: movw r0, #32768
+; CHECK-T2-NEXT: cmn.w r1, #32768
+; CHECK-T2-NEXT: movt r0, #65535
+; CHECK-T2-NEXT: it gt
+; CHECK-T2-NEXT: movgt r0, r1
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #16
-; CHECK-ARM-NEXT: sub r12, r0, r1, lsl #16
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: cmp r12, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: mov r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #16
-; CHECK-ARM-NEXT: movvc r2, r12
-; CHECK-ARM-NEXT: asr r0, r2, #16
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: movw r1, #32767
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movlt r1, r0
+; CHECK-ARM-NEXT: movw r0, #32768
+; CHECK-ARM-NEXT: movt r0, #65535
+; CHECK-ARM-NEXT: cmn r1, #32768
+; CHECK-ARM-NEXT: movgt r0, r1
; CHECK-ARM-NEXT: bx lr
%tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %y)
ret i16 %tmp
@@ -283,69 +265,39 @@ define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r2, r0, #24
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB3_2
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #127
+; CHECK-T1-NEXT: cmp r0, #127
+; CHECK-T1-NEXT: blt .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB3_4
+; CHECK-T1-NEXT: mvns r1, r1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB3_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB3_5
-; CHECK-T1-NEXT: b .LBB3_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI3_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB3_6
-; CHECK-T1-NEXT: .LBB3_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB3_6:
-; CHECK-T1-NEXT: asrs r0, r0, #24
-; CHECK-T1-NEXT: pop {r4, pc}
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI3_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #24
-; CHECK-T2-NEXT: sub.w r12, r0, r1, lsl #24
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: cmp.w r12, #0
-; CHECK-T2-NEXT: mov.w r2, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r2, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #24
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r2, r12
-; CHECK-T2-NEXT: asrs r0, r2, #24
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: cmp r0, #127
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #127
+; CHECK-T2-NEXT: cmn.w r0, #128
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #127
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #24
-; CHECK-ARM-NEXT: sub r12, r0, r1, lsl #24
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: cmp r12, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: mov r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #24
-; CHECK-ARM-NEXT: movvc r2, r12
-; CHECK-ARM-NEXT: asr r0, r2, #24
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #127
+; CHECK-ARM-NEXT: movge r0, #127
+; CHECK-ARM-NEXT: cmn r0, #128
+; CHECK-ARM-NEXT: mvnle r0, #127
; CHECK-ARM-NEXT: bx lr
%tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %y)
ret i8 %tmp
@@ -354,69 +306,39 @@ define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; CHECK-T1-LABEL: func3:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
-; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r2, r0, #28
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB4_2
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #7
+; CHECK-T1-NEXT: cmp r0, #7
+; CHECK-T1-NEXT: blt .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB4_4
+; CHECK-T1-NEXT: mvns r1, r1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB4_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB4_5
-; CHECK-T1-NEXT: b .LBB4_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI4_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB4_6
-; CHECK-T1-NEXT: .LBB4_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB4_6:
-; CHECK-T1-NEXT: asrs r0, r0, #28
-; CHECK-T1-NEXT: pop {r4, pc}
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI4_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func3:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #28
-; CHECK-T2-NEXT: sub.w r12, r0, r1, lsl #28
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: cmp.w r12, #0
-; CHECK-T2-NEXT: mov.w r2, #-2147483648
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r2, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #28
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r2, r12
-; CHECK-T2-NEXT: asrs r0, r2, #28
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: cmp r0, #7
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #7
+; CHECK-T2-NEXT: cmn.w r0, #8
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #7
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func3:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #28
-; CHECK-ARM-NEXT: sub r12, r0, r1, lsl #28
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: cmp r12, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: mov r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r2, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #28
-; CHECK-ARM-NEXT: movvc r2, r12
-; CHECK-ARM-NEXT: asr r0, r2, #28
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #7
+; CHECK-ARM-NEXT: movge r0, #7
+; CHECK-ARM-NEXT: cmn r0, #8
+; CHECK-ARM-NEXT: mvnle r0, #7
; CHECK-ARM-NEXT: bx lr
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y)
ret i4 %tmp
diff --git a/llvm/test/CodeGen/ARM/ssub_sat_plus.ll b/llvm/test/CodeGen/ARM/ssub_sat_plus.ll
index 67c655391d1..9a598408d9e 100644
--- a/llvm/test/CodeGen/ARM/ssub_sat_plus.ll
+++ b/llvm/test/CodeGen/ARM/ssub_sat_plus.ll
@@ -222,72 +222,57 @@ define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r2, r0, #16
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB2_2
+; CHECK-T1-NEXT: sxth r1, r1
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: blt .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB2_4
+; CHECK-T1-NEXT: ldr r1, .LCPI2_1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB2_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB2_5
-; CHECK-T1-NEXT: b .LBB2_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI2_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB2_6
-; CHECK-T1-NEXT: .LBB2_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB2_6:
-; CHECK-T1-NEXT: asrs r0, r0, #16
-; CHECK-T1-NEXT: pop {r4, pc}
+; CHECK-T1-NEXT: bx lr
; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
+; CHECK-T1-NEXT: @ %bb.5:
; CHECK-T1-NEXT: .LCPI2_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: .long 32767 @ 0x7fff
+; CHECK-T1-NEXT: .LCPI2_1:
+; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: mul r12, r1, r2
-; CHECK-T2-NEXT: lsls r0, r0, #16
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: mov.w r1, #-2147483648
-; CHECK-T2-NEXT: sub.w r2, r0, r12, lsl #16
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r1, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r12, lsl #16
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r1, r2
-; CHECK-T2-NEXT: asrs r0, r1, #16
+; CHECK-T2-NEXT: muls r1, r2, r1
+; CHECK-T2-NEXT: sxth r1, r1
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: movw r1, #32767
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it lt
+; CHECK-T2-NEXT: movlt r1, r0
+; CHECK-T2-NEXT: movw r0, #32768
+; CHECK-T2-NEXT: movt r0, #65535
+; CHECK-T2-NEXT: cmn.w r1, #32768
+; CHECK-T2-NEXT: it gt
+; CHECK-T2-NEXT: movgt r0, r1
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: smulbb r12, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #16
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: mov r1, #-2147483648
-; CHECK-ARM-NEXT: sub r2, r0, r12, lsl #16
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r1, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r12, lsl #16
-; CHECK-ARM-NEXT: movvc r1, r2
-; CHECK-ARM-NEXT: asr r0, r1, #16
+; CHECK-ARM-NEXT: smulbb r1, r1, r2
+; CHECK-ARM-NEXT: sxth r1, r1
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: movw r1, #32767
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movlt r1, r0
+; CHECK-ARM-NEXT: movw r0, #32768
+; CHECK-ARM-NEXT: movt r0, #65535
+; CHECK-ARM-NEXT: cmn r1, #32768
+; CHECK-ARM-NEXT: movgt r0, r1
; CHECK-ARM-NEXT: bx lr
%a = mul i16 %y, %z
%tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %a)
@@ -297,72 +282,45 @@ define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounw
define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r2, r0, #24
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB3_2
+; CHECK-T1-NEXT: sxtb r1, r1
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #127
+; CHECK-T1-NEXT: cmp r0, #127
+; CHECK-T1-NEXT: blt .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB3_4
+; CHECK-T1-NEXT: mvns r1, r1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB3_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB3_5
-; CHECK-T1-NEXT: b .LBB3_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI3_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB3_6
-; CHECK-T1-NEXT: .LBB3_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB3_6:
-; CHECK-T1-NEXT: asrs r0, r0, #24
-; CHECK-T1-NEXT: pop {r4, pc}
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI3_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: mul r12, r1, r2
-; CHECK-T2-NEXT: lsls r0, r0, #24
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: mov.w r1, #-2147483648
-; CHECK-T2-NEXT: sub.w r2, r0, r12, lsl #24
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r1, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r12, lsl #24
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r1, r2
-; CHECK-T2-NEXT: asrs r0, r1, #24
+; CHECK-T2-NEXT: muls r1, r2, r1
+; CHECK-T2-NEXT: sxtb r1, r1
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: cmp r0, #127
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #127
+; CHECK-T2-NEXT: cmn.w r0, #128
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #127
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: smulbb r12, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #24
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: mov r1, #-2147483648
-; CHECK-ARM-NEXT: sub r2, r0, r12, lsl #24
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r1, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r12, lsl #24
-; CHECK-ARM-NEXT: movvc r1, r2
-; CHECK-ARM-NEXT: asr r0, r1, #24
+; CHECK-ARM-NEXT: smulbb r1, r1, r2
+; CHECK-ARM-NEXT: sxtb r1, r1
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #127
+; CHECK-ARM-NEXT: movge r0, #127
+; CHECK-ARM-NEXT: cmn r0, #128
+; CHECK-ARM-NEXT: mvnle r0, #127
; CHECK-ARM-NEXT: bx lr
%a = mul i8 %y, %z
%tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %a)
@@ -372,72 +330,46 @@ define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; CHECK-T1-LABEL: func4:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: .save {r4, lr}
-; CHECK-T1-NEXT: push {r4, lr}
; CHECK-T1-NEXT: muls r1, r2, r1
; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r2, r0, #28
-; CHECK-T1-NEXT: movs r3, #1
-; CHECK-T1-NEXT: subs r0, r2, r1
-; CHECK-T1-NEXT: mov r4, r3
-; CHECK-T1-NEXT: bmi .LBB4_2
+; CHECK-T1-NEXT: asrs r1, r1, #28
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: movs r1, #7
+; CHECK-T1-NEXT: cmp r0, #7
+; CHECK-T1-NEXT: blt .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r4, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: cmp r4, #0
-; CHECK-T1-NEXT: bne .LBB4_4
+; CHECK-T1-NEXT: mvns r1, r1
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bgt .LBB4_4
; CHECK-T1-NEXT: @ %bb.3:
-; CHECK-T1-NEXT: lsls r3, r3, #31
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvs .LBB4_5
-; CHECK-T1-NEXT: b .LBB4_6
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_4:
-; CHECK-T1-NEXT: ldr r3, .LCPI4_0
-; CHECK-T1-NEXT: cmp r2, r1
-; CHECK-T1-NEXT: bvc .LBB4_6
-; CHECK-T1-NEXT: .LBB4_5:
-; CHECK-T1-NEXT: mov r0, r3
-; CHECK-T1-NEXT: .LBB4_6:
-; CHECK-T1-NEXT: asrs r0, r0, #28
-; CHECK-T1-NEXT: pop {r4, pc}
-; CHECK-T1-NEXT: .p2align 2
-; CHECK-T1-NEXT: @ %bb.7:
-; CHECK-T1-NEXT: .LCPI4_0:
-; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
+; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func4:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: mul r12, r1, r2
-; CHECK-T2-NEXT: lsls r0, r0, #28
-; CHECK-T2-NEXT: movs r3, #0
-; CHECK-T2-NEXT: mov.w r1, #-2147483648
-; CHECK-T2-NEXT: sub.w r2, r0, r12, lsl #28
-; CHECK-T2-NEXT: cmp r2, #0
-; CHECK-T2-NEXT: it mi
-; CHECK-T2-NEXT: movmi r3, #1
-; CHECK-T2-NEXT: cmp r3, #0
-; CHECK-T2-NEXT: it ne
-; CHECK-T2-NEXT: mvnne r1, #-2147483648
-; CHECK-T2-NEXT: cmp.w r0, r12, lsl #28
-; CHECK-T2-NEXT: it vc
-; CHECK-T2-NEXT: movvc r1, r2
-; CHECK-T2-NEXT: asrs r0, r1, #28
+; CHECK-T2-NEXT: muls r1, r2, r1
+; CHECK-T2-NEXT: lsls r1, r1, #28
+; CHECK-T2-NEXT: sub.w r0, r0, r1, asr #28
+; CHECK-T2-NEXT: cmp r0, #7
+; CHECK-T2-NEXT: it ge
+; CHECK-T2-NEXT: movge r0, #7
+; CHECK-T2-NEXT: cmn.w r0, #8
+; CHECK-T2-NEXT: it le
+; CHECK-T2-NEXT: mvnle r0, #7
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func4:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: smulbb r12, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #28
-; CHECK-ARM-NEXT: mov r3, #0
-; CHECK-ARM-NEXT: mov r1, #-2147483648
-; CHECK-ARM-NEXT: sub r2, r0, r12, lsl #28
-; CHECK-ARM-NEXT: cmp r2, #0
-; CHECK-ARM-NEXT: movwmi r3, #1
-; CHECK-ARM-NEXT: cmp r3, #0
-; CHECK-ARM-NEXT: mvnne r1, #-2147483648
-; CHECK-ARM-NEXT: cmp r0, r12, lsl #28
-; CHECK-ARM-NEXT: movvc r1, r2
-; CHECK-ARM-NEXT: asr r0, r1, #28
+; CHECK-ARM-NEXT: smulbb r1, r1, r2
+; CHECK-ARM-NEXT: lsl r1, r1, #28
+; CHECK-ARM-NEXT: sub r0, r0, r1, asr #28
+; CHECK-ARM-NEXT: cmp r0, #7
+; CHECK-ARM-NEXT: movge r0, #7
+; CHECK-ARM-NEXT: cmn r0, #8
+; CHECK-ARM-NEXT: mvnle r0, #7
; CHECK-ARM-NEXT: bx lr
%a = mul i4 %y, %z
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)
diff --git a/llvm/test/CodeGen/ARM/uadd_sat.ll b/llvm/test/CodeGen/ARM/uadd_sat.ll
index 3de65959156..d7c4e977c68 100644
--- a/llvm/test/CodeGen/ARM/uadd_sat.ll
+++ b/llvm/test/CodeGen/ARM/uadd_sat.ll
@@ -93,34 +93,34 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y) nounwind {
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r0, r0, #16
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
; CHECK-T1-NEXT: blo .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #16
; CHECK-T1-NEXT: bx lr
+; CHECK-T1-NEXT: .p2align 2
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: .LCPI2_0:
+; CHECK-T1-NEXT: .long 65535 @ 0xffff
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #16
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #16
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #16
+; CHECK-T2-NEXT: add r1, r0
+; CHECK-T2-NEXT: movw r0, #65535
+; CHECK-T2-NEXT: cmp r1, r0
; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #16
+; CHECK-T2-NEXT: movlo r0, r1
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #16
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #16
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #16
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #16
+; CHECK-ARM-NEXT: add r1, r0, r1
+; CHECK-ARM-NEXT: movw r0, #65535
+; CHECK-ARM-NEXT: cmp r1, r0
+; CHECK-ARM-NEXT: movlo r0, r1
; CHECK-ARM-NEXT: bx lr
%tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y)
ret i16 %tmp
@@ -129,34 +129,27 @@ define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y) nounwind {
define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r0, r0, #24
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: cmp r0, #255
; CHECK-T1-NEXT: blo .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: movs r0, #255
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #24
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #24
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #24
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #24
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #24
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: cmp r0, #255
+; CHECK-T2-NEXT: it hs
+; CHECK-T2-NEXT: movhs r0, #255
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #24
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #24
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #24
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #24
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #255
+; CHECK-ARM-NEXT: movhs r0, #255
; CHECK-ARM-NEXT: bx lr
%tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y)
ret i8 %tmp
@@ -165,34 +158,27 @@ define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y) nounwind {
define zeroext i4 @func3(i4 zeroext %x, i4 zeroext %y) nounwind {
; CHECK-T1-LABEL: func3:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r0, r0, #28
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: cmp r0, #15
; CHECK-T1-NEXT: blo .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: movs r0, #15
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #28
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func3:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r2, r0, #28
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #28
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #28
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #28
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: cmp r0, #15
+; CHECK-T2-NEXT: it hs
+; CHECK-T2-NEXT: movhs r0, #15
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func3:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r2, r0, #28
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #28
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #28
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #28
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #15
+; CHECK-ARM-NEXT: movhs r0, #15
; CHECK-ARM-NEXT: bx lr
%tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y)
ret i4 %tmp
diff --git a/llvm/test/CodeGen/ARM/uadd_sat_plus.ll b/llvm/test/CodeGen/ARM/uadd_sat_plus.ll
index 64f7c0d9ade..3ebdafa49d9 100644
--- a/llvm/test/CodeGen/ARM/uadd_sat_plus.ll
+++ b/llvm/test/CodeGen/ARM/uadd_sat_plus.ll
@@ -102,36 +102,48 @@ define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y, i16 zeroext %z) nounw
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r0, r0, #16
+; CHECK-T1-NEXT: uxth r1, r1
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: ldr r1, .LCPI2_0
+; CHECK-T1-NEXT: cmp r0, r1
; CHECK-T1-NEXT: blo .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #16
; CHECK-T1-NEXT: bx lr
+; CHECK-T1-NEXT: .p2align 2
+; CHECK-T1-NEXT: @ %bb.3:
+; CHECK-T1-NEXT: .LCPI2_0:
+; CHECK-T1-NEXT: .long 65535 @ 0xffff
;
-; CHECK-T2-LABEL: func16:
-; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #16
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #16
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #16
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #16
-; CHECK-T2-NEXT: bx lr
+; CHECK-T2NODSP-LABEL: func16:
+; CHECK-T2NODSP: @ %bb.0:
+; CHECK-T2NODSP-NEXT: muls r1, r2, r1
+; CHECK-T2NODSP-NEXT: uxth r1, r1
+; CHECK-T2NODSP-NEXT: add r1, r0
+; CHECK-T2NODSP-NEXT: movw r0, #65535
+; CHECK-T2NODSP-NEXT: cmp r1, r0
+; CHECK-T2NODSP-NEXT: it lo
+; CHECK-T2NODSP-NEXT: movlo r0, r1
+; CHECK-T2NODSP-NEXT: bx lr
+;
+; CHECK-T2DSP-LABEL: func16:
+; CHECK-T2DSP: @ %bb.0:
+; CHECK-T2DSP-NEXT: muls r1, r2, r1
+; CHECK-T2DSP-NEXT: uxtah r1, r0, r1
+; CHECK-T2DSP-NEXT: movw r0, #65535
+; CHECK-T2DSP-NEXT: cmp r1, r0
+; CHECK-T2DSP-NEXT: it lo
+; CHECK-T2DSP-NEXT: movlo r0, r1
+; CHECK-T2DSP-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: mul r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #16
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #16
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #16
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #16
+; CHECK-ARM-NEXT: uxtah r1, r0, r1
+; CHECK-ARM-NEXT: movw r0, #65535
+; CHECK-ARM-NEXT: cmp r1, r0
+; CHECK-ARM-NEXT: movlo r0, r1
; CHECK-ARM-NEXT: bx lr
%a = mul i16 %y, %z
%tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %a)
@@ -142,36 +154,40 @@ define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y, i8 zeroext %z) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r0, r0, #24
+; CHECK-T1-NEXT: uxtb r1, r1
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: cmp r0, #255
; CHECK-T1-NEXT: blo .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: movs r0, #255
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #24
; CHECK-T1-NEXT: bx lr
;
-; CHECK-T2-LABEL: func8:
-; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #24
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #24
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #24
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #24
-; CHECK-T2-NEXT: bx lr
+; CHECK-T2NODSP-LABEL: func8:
+; CHECK-T2NODSP: @ %bb.0:
+; CHECK-T2NODSP-NEXT: muls r1, r2, r1
+; CHECK-T2NODSP-NEXT: uxtb r1, r1
+; CHECK-T2NODSP-NEXT: add r0, r1
+; CHECK-T2NODSP-NEXT: cmp r0, #255
+; CHECK-T2NODSP-NEXT: it hs
+; CHECK-T2NODSP-NEXT: movhs r0, #255
+; CHECK-T2NODSP-NEXT: bx lr
+;
+; CHECK-T2DSP-LABEL: func8:
+; CHECK-T2DSP: @ %bb.0:
+; CHECK-T2DSP-NEXT: muls r1, r2, r1
+; CHECK-T2DSP-NEXT: uxtab r0, r0, r1
+; CHECK-T2DSP-NEXT: cmp r0, #255
+; CHECK-T2DSP-NEXT: it hs
+; CHECK-T2DSP-NEXT: movhs r0, #255
+; CHECK-T2DSP-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #24
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #24
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #24
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #24
+; CHECK-ARM-NEXT: uxtab r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #255
+; CHECK-ARM-NEXT: movhs r0, #255
; CHECK-ARM-NEXT: bx lr
%a = mul i8 %y, %z
%tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %a)
@@ -182,36 +198,33 @@ define zeroext i4 @func4(i4 zeroext %x, i4 zeroext %y, i4 zeroext %z) nounwind {
; CHECK-T1-LABEL: func4:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r0, r0, #28
+; CHECK-T1-NEXT: movs r2, #15
+; CHECK-T1-NEXT: ands r1, r2
; CHECK-T1-NEXT: adds r0, r0, r1
+; CHECK-T1-NEXT: cmp r0, #15
; CHECK-T1-NEXT: blo .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
-; CHECK-T1-NEXT: mvns r0, r0
+; CHECK-T1-NEXT: mov r0, r2
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #28
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func4:
; CHECK-T2: @ %bb.0:
; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r2, r0, #28
-; CHECK-T2-NEXT: add.w r1, r2, r1, lsl #28
-; CHECK-T2-NEXT: cmp.w r1, r0, lsl #28
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo.w r1, #-1
-; CHECK-T2-NEXT: lsrs r0, r1, #28
+; CHECK-T2-NEXT: and r1, r1, #15
+; CHECK-T2-NEXT: add r0, r1
+; CHECK-T2-NEXT: cmp r0, #15
+; CHECK-T2-NEXT: it hs
+; CHECK-T2-NEXT: movhs r0, #15
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func4:
; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r2, r0, #28
-; CHECK-ARM-NEXT: add r1, r2, r1, lsl #28
-; CHECK-ARM-NEXT: cmp r1, r0, lsl #28
-; CHECK-ARM-NEXT: mvnlo r1, #0
-; CHECK-ARM-NEXT: lsr r0, r1, #28
+; CHECK-ARM-NEXT: and r1, r1, #15
+; CHECK-ARM-NEXT: add r0, r0, r1
+; CHECK-ARM-NEXT: cmp r0, #15
+; CHECK-ARM-NEXT: movhs r0, #15
; CHECK-ARM-NEXT: bx lr
%a = mul i4 %y, %z
%tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %a)
diff --git a/llvm/test/CodeGen/ARM/usub_sat.ll b/llvm/test/CodeGen/ARM/usub_sat.ll
index c080b0286e1..c348801e50e 100644
--- a/llvm/test/CodeGen/ARM/usub_sat.ll
+++ b/llvm/test/CodeGen/ARM/usub_sat.ll
@@ -93,33 +93,30 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y) nounwind {
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r0, r0, #16
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB2_2
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bhi .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #16
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: uxth r0, r0
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #16
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #16
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #16
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #16
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it ls
+; CHECK-T2-NEXT: movls r0, r1
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: uxth r0, r0
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #16
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #16
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #16
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #16
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movls r0, r1
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: uxth r0, r0
; CHECK-ARM-NEXT: bx lr
%tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %y)
ret i16 %tmp
@@ -128,33 +125,30 @@ define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y) nounwind {
define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r0, r0, #24
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB3_2
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bhi .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #24
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: uxtb r0, r0
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #24
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #24
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #24
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #24
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it ls
+; CHECK-T2-NEXT: movls r0, r1
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: uxtb r0, r0
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #24
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #24
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #24
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #24
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movls r0, r1
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: uxtb r0, r0
; CHECK-ARM-NEXT: bx lr
%tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %y)
ret i8 %tmp
@@ -163,33 +157,31 @@ define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y) nounwind {
define zeroext i4 @func3(i4 zeroext %x, i4 zeroext %y) nounwind {
; CHECK-T1-LABEL: func3:
; CHECK-T1: @ %bb.0:
-; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r0, r0, #28
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB4_2
+; CHECK-T1-NEXT: cmp r0, r1
+; CHECK-T1-NEXT: bhi .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r1
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #28
+; CHECK-T1-NEXT: subs r1, r0, r1
+; CHECK-T1-NEXT: movs r0, #15
+; CHECK-T1-NEXT: ands r0, r1
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func3:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: lsls r0, r0, #28
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #28
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #28
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #28
+; CHECK-T2-NEXT: cmp r0, r1
+; CHECK-T2-NEXT: it ls
+; CHECK-T2-NEXT: movls r0, r1
+; CHECK-T2-NEXT: subs r0, r0, r1
+; CHECK-T2-NEXT: and r0, r0, #15
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func3:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: lsl r0, r0, #28
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #28
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #28
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #28
+; CHECK-ARM-NEXT: cmp r0, r1
+; CHECK-ARM-NEXT: movls r0, r1
+; CHECK-ARM-NEXT: sub r0, r0, r1
+; CHECK-ARM-NEXT: and r0, r0, #15
; CHECK-ARM-NEXT: bx lr
%tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y)
ret i4 %tmp
diff --git a/llvm/test/CodeGen/ARM/usub_sat_plus.ll b/llvm/test/CodeGen/ARM/usub_sat_plus.ll
index dc1e6e578de..0db6c7a8269 100644
--- a/llvm/test/CodeGen/ARM/usub_sat_plus.ll
+++ b/llvm/test/CodeGen/ARM/usub_sat_plus.ll
@@ -104,35 +104,35 @@ define zeroext i16 @func16(i16 zeroext %x, i16 zeroext %y, i16 zeroext %z) nounw
; CHECK-T1-LABEL: func16:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #16
-; CHECK-T1-NEXT: lsls r0, r0, #16
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB2_2
+; CHECK-T1-NEXT: uxth r2, r1
+; CHECK-T1-NEXT: cmp r0, r2
+; CHECK-T1-NEXT: bhi .LBB2_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r2
; CHECK-T1-NEXT: .LBB2_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #16
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: uxth r0, r0
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func16:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r0, r0, #16
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #16
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #16
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #16
+; CHECK-T2-NEXT: mul r3, r1, r2
+; CHECK-T2-NEXT: uxth r3, r3
+; CHECK-T2-NEXT: cmp r0, r3
+; CHECK-T2-NEXT: it hi
+; CHECK-T2-NEXT: movhi r3, r0
+; CHECK-T2-NEXT: mls r0, r1, r2, r3
+; CHECK-T2-NEXT: uxth r0, r0
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func16:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: mul r1, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #16
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #16
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #16
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #16
+; CHECK-ARM-NEXT: mul r3, r1, r2
+; CHECK-ARM-NEXT: uxth r3, r3
+; CHECK-ARM-NEXT: cmp r0, r3
+; CHECK-ARM-NEXT: movhi r3, r0
+; CHECK-ARM-NEXT: mls r0, r1, r2, r3
+; CHECK-ARM-NEXT: uxth r0, r0
; CHECK-ARM-NEXT: bx lr
%a = mul i16 %y, %z
%tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a)
@@ -143,35 +143,35 @@ define zeroext i8 @func8(i8 zeroext %x, i8 zeroext %y, i8 zeroext %z) nounwind {
; CHECK-T1-LABEL: func8:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #24
-; CHECK-T1-NEXT: lsls r0, r0, #24
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB3_2
+; CHECK-T1-NEXT: uxtb r2, r1
+; CHECK-T1-NEXT: cmp r0, r2
+; CHECK-T1-NEXT: bhi .LBB3_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r2
; CHECK-T1-NEXT: .LBB3_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #24
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: uxtb r0, r0
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func8:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r0, r0, #24
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #24
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #24
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #24
+; CHECK-T2-NEXT: mul r3, r1, r2
+; CHECK-T2-NEXT: uxtb r3, r3
+; CHECK-T2-NEXT: cmp r0, r3
+; CHECK-T2-NEXT: it hi
+; CHECK-T2-NEXT: movhi r3, r0
+; CHECK-T2-NEXT: mls r0, r1, r2, r3
+; CHECK-T2-NEXT: uxtb r0, r0
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func8:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #24
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #24
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #24
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #24
+; CHECK-ARM-NEXT: smulbb r3, r1, r2
+; CHECK-ARM-NEXT: uxtb r3, r3
+; CHECK-ARM-NEXT: cmp r0, r3
+; CHECK-ARM-NEXT: movhi r3, r0
+; CHECK-ARM-NEXT: mls r0, r1, r2, r3
+; CHECK-ARM-NEXT: uxtb r0, r0
; CHECK-ARM-NEXT: bx lr
%a = mul i8 %y, %z
%tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a)
@@ -182,35 +182,37 @@ define zeroext i4 @func4(i4 zeroext %x, i4 zeroext %y, i4 zeroext %z) nounwind {
; CHECK-T1-LABEL: func4:
; CHECK-T1: @ %bb.0:
; CHECK-T1-NEXT: muls r1, r2, r1
-; CHECK-T1-NEXT: lsls r1, r1, #28
-; CHECK-T1-NEXT: lsls r0, r0, #28
-; CHECK-T1-NEXT: subs r0, r0, r1
-; CHECK-T1-NEXT: bhs .LBB4_2
+; CHECK-T1-NEXT: movs r2, #15
+; CHECK-T1-NEXT: mov r3, r1
+; CHECK-T1-NEXT: ands r3, r2
+; CHECK-T1-NEXT: cmp r0, r3
+; CHECK-T1-NEXT: bhi .LBB4_2
; CHECK-T1-NEXT: @ %bb.1:
-; CHECK-T1-NEXT: movs r0, #0
+; CHECK-T1-NEXT: mov r0, r3
; CHECK-T1-NEXT: .LBB4_2:
-; CHECK-T1-NEXT: lsrs r0, r0, #28
+; CHECK-T1-NEXT: subs r0, r0, r1
+; CHECK-T1-NEXT: ands r0, r2
; CHECK-T1-NEXT: bx lr
;
; CHECK-T2-LABEL: func4:
; CHECK-T2: @ %bb.0:
-; CHECK-T2-NEXT: muls r1, r2, r1
-; CHECK-T2-NEXT: lsls r0, r0, #28
-; CHECK-T2-NEXT: sub.w r2, r0, r1, lsl #28
-; CHECK-T2-NEXT: cmp.w r0, r1, lsl #28
-; CHECK-T2-NEXT: it lo
-; CHECK-T2-NEXT: movlo r2, #0
-; CHECK-T2-NEXT: lsrs r0, r2, #28
+; CHECK-T2-NEXT: mul r3, r1, r2
+; CHECK-T2-NEXT: and r3, r3, #15
+; CHECK-T2-NEXT: cmp r0, r3
+; CHECK-T2-NEXT: it hi
+; CHECK-T2-NEXT: movhi r3, r0
+; CHECK-T2-NEXT: mls r0, r1, r2, r3
+; CHECK-T2-NEXT: and r0, r0, #15
; CHECK-T2-NEXT: bx lr
;
; CHECK-ARM-LABEL: func4:
; CHECK-ARM: @ %bb.0:
-; CHECK-ARM-NEXT: smulbb r1, r1, r2
-; CHECK-ARM-NEXT: lsl r0, r0, #28
-; CHECK-ARM-NEXT: sub r2, r0, r1, lsl #28
-; CHECK-ARM-NEXT: cmp r0, r1, lsl #28
-; CHECK-ARM-NEXT: movlo r2, #0
-; CHECK-ARM-NEXT: lsr r0, r2, #28
+; CHECK-ARM-NEXT: smulbb r3, r1, r2
+; CHECK-ARM-NEXT: and r3, r3, #15
+; CHECK-ARM-NEXT: cmp r0, r3
+; CHECK-ARM-NEXT: movhi r3, r0
+; CHECK-ARM-NEXT: mls r0, r1, r2, r3
+; CHECK-ARM-NEXT: and r0, r0, #15
; CHECK-ARM-NEXT: bx lr
%a = mul i4 %y, %z
%tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a)
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