diff options
Diffstat (limited to 'llvm/test/CodeGen/ARM')
-rw-r--r-- | llvm/test/CodeGen/ARM/call-tc.ll | 36 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/ifcvt6-tc.ll | 23 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/insn-sched1-tc.ll | 11 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/ldm-tc.ll | 37 |
4 files changed, 107 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/call-tc.ll b/llvm/test/CodeGen/ARM/call-tc.ll new file mode 100644 index 00000000000..8103fab2092 --- /dev/null +++ b/llvm/test/CodeGen/ARM/call-tc.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4 +; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5 +; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\ +; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF + +@t = weak global i32 ()* null ; <i32 ()**> [#uses=1] + +declare void @g(i32, i32, i32, i32) + +define void @f() { +; CHECKELF: PLT + call void @g( i32 1, i32 2, i32 3, i32 4 ) + ret void +} + +define void @g.upgrd.1() { +; CHECKV4: bx r0 @ TAILCALL +; CHECKV5: bx r0 @ TAILCALL + %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] + %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] + ret void +} + +define i32* @m_231b(i32, i32, i32*, i32*, i32*) nounwind { +; CHECKV4: m_231b +; CHECKV4: bx r{{.*}} +BB0: + %5 = inttoptr i32 %0 to i32* ; <i32*> [#uses=1] + %t35 = volatile load i32* %5 ; <i32> [#uses=1] + %6 = inttoptr i32 %t35 to i32** ; <i32**> [#uses=1] + %7 = getelementptr i32** %6, i32 86 ; <i32**> [#uses=1] + %8 = load i32** %7 ; <i32*> [#uses=1] + %9 = bitcast i32* %8 to i32* (i32, i32*, i32, i32*, i32*, i32*)* ; <i32* (i32, i32*, i32, i32*, i32*, i32*)*> [#uses=1] + %10 = call i32* %9(i32 %0, i32* null, i32 %1, i32* %2, i32* %3, i32* %4) ; <i32*> [#uses=1] + ret i32* %10 +} diff --git a/llvm/test/CodeGen/ARM/ifcvt6-tc.ll b/llvm/test/CodeGen/ARM/ifcvt6-tc.ll new file mode 100644 index 00000000000..5b28804f380 --- /dev/null +++ b/llvm/test/CodeGen/ARM/ifcvt6-tc.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ +; RUN: grep cmpne | count 1 +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ +; RUN: grep bhi | count 1 +; Here, tail call wins over eliminating branches. It is 1 fewer instruction +; and removes all stack accesses, so seems like a win. + +define void @foo(i32 %X, i32 %Y) { +entry: + %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1] + %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] + %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1] + br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock + +cond_true: ; preds = %entry + %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare i32 @bar(...) diff --git a/llvm/test/CodeGen/ARM/insn-sched1-tc.ll b/llvm/test/CodeGen/ARM/insn-sched1-tc.ll new file mode 100644 index 00000000000..c457c8c5a55 --- /dev/null +++ b/llvm/test/CodeGen/ARM/insn-sched1-tc.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+v6 +; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 |\ +; RUN: grep mov | count 2 + +define i32 @test(i32 %x) { + %tmp = trunc i32 %x to i16 ; <i16> [#uses=1] + %tmp2 = tail call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1] + ret i32 %tmp2 +} + +declare i32 @f(i32, i16) diff --git a/llvm/test/CodeGen/ARM/ldm-tc.ll b/llvm/test/CodeGen/ARM/ldm-tc.ll new file mode 100644 index 00000000000..3819192429e --- /dev/null +++ b/llvm/test/CodeGen/ARM/ldm-tc.ll @@ -0,0 +1,37 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s + +@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] + +define i32 @t1() { +; CHECK: t1: +; CHECK: ldmia + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] + %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1] + ret i32 %tmp4 +} + +define i32 @t2() { +; CHECK: t2: +; CHECK: ldmia + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] + %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1] + %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @t3() { +; CHECK: t3: +; CHECK: ldmib +; CHECK: b.w _f2 @ TAILCALL + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] + %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] + %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1] + ret i32 %tmp6 +} + +declare i32 @f1(i32, i32) + +declare i32 @f2(i32, i32, i32) |