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-rw-r--r--llvm/test/CodeGen/ARM/atomic-op.ll5
-rw-r--r--llvm/test/CodeGen/ARM/sat-to-bitop.ll157
2 files changed, 160 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/atomic-op.ll b/llvm/test/CodeGen/ARM/atomic-op.ll
index 2337e835480..a374180a627 100644
--- a/llvm/test/CodeGen/ARM/atomic-op.ll
+++ b/llvm/test/CodeGen/ARM/atomic-op.ll
@@ -129,11 +129,12 @@ entry:
store i32 %9, i32* %old
call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
; CHECK: ldrex
- ; CHECK: cmp
+ ; CHECK: bic
+ ; CHECK-NOT: cmp
; CHECK: strex
; CHECK-T1: bl ___sync_fetch_and_max_4
; CHECK-T1-M0: bl ___sync_fetch_and_max_4
- ; CHECK-BAREMETAL: cmp
+ ; CHECK-BAREMETAL: bic
; CHECK-BAREMETAL-NOT: __sync
%10 = atomicrmw max i32* %val2, i32 0 monotonic
store i32 %10, i32* %old
diff --git a/llvm/test/CodeGen/ARM/sat-to-bitop.ll b/llvm/test/CodeGen/ARM/sat-to-bitop.ll
new file mode 100644
index 00000000000..864bafc03e2
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/sat-to-bitop.ll
@@ -0,0 +1,157 @@
+; RUN: llc -mtriple=arm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM --check-prefix=CHECK-CMP
+; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T --check-prefix=CHECK-CMP
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T2 --check-prefix=CHECK-CMP
+
+
+; Check for clipping against 0 that should result in bic
+;
+; Base tests with different bit widths
+;
+
+; x < 0 ? 0 : x
+; 32-bit base test
+define i32 @sat0_base_32bit(i32 %x) #0 {
+; CHECK-LABEL: sat0_base_32bit:
+; CHECK-CMP-NOT: cmp
+; CHECK-ARM: bic {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T2: bic.w {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T: asrs [[IM:r[0-9]]], {{r[0-9]}}, #31
+; CHECK-T-NEXT: bics {{r[0-9]}}, [[IM]]
+entry:
+ %cmpLow = icmp slt i32 %x, 0
+ %saturateLow = select i1 %cmpLow, i32 0, i32 %x
+ ret i32 %saturateLow
+}
+
+; x < 0 ? 0 : x
+; 16-bit base test
+define i16 @sat0_base_16bit(i16 %x) #0 {
+; CHECK-LABEL: sat0_base_16bit:
+; CHECK-CMP: cmp
+; CHECK-ARM-NOT: bic
+; CHECK-T2-NOT: bic.w
+; CHECK-T-NOT: bics
+entry:
+ %cmpLow = icmp slt i16 %x, 0
+ %saturateLow = select i1 %cmpLow, i16 0, i16 %x
+ ret i16 %saturateLow
+}
+
+; x < 0 ? 0 : x
+; 8-bit base test
+define i8 @sat0_base_8bit(i8 %x) #0 {
+; CHECK-LABEL: sat0_base_8bit:
+; CHECK-CMP: cmp
+; CHECK-ARM-NOT: bic
+; CHECK-T2-NOT: bic.w
+entry:
+ %cmpLow = icmp slt i8 %x, 0
+ %saturateLow = select i1 %cmpLow, i8 0, i8 %x
+ ret i8 %saturateLow
+}
+
+; Test where the conditional is formed in a different way
+
+; x > 0 ? x : 0
+define i32 @sat0_lower_1(i32 %x) #0 {
+; CHECK-LABEL: sat0_lower_1:
+; CHECK-CMP-NOT: cmp
+; CHECK-ARM: bic {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T2: bic.w {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T: asrs [[IM:r[0-9]]], {{r[0-9]}}, #31
+; CHECK-T-NEXT: bics {{r[0-9]}}, [[IM]]
+entry:
+ %cmpGt = icmp sgt i32 %x, 0
+ %saturateLow = select i1 %cmpGt, i32 %x, i32 0
+ ret i32 %saturateLow
+}
+
+
+; Check for clipping against -1 that should result in orr
+;
+; Base tests with different bit widths
+;
+
+; x < -1 ? -1 : x
+; 32-bit base test
+define i32 @sat1_base_32bit(i32 %x) #0 {
+; CHECK-LABEL: sat1_base_32bit:
+; CHECK-CMP-NOT: cmp
+; CHECK-ARM: orr {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T2: orr.w {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T: asrs [[IM:r[0-9]]], {{r[0-9]}}, #31
+; CHECK-T-NEXT: orrs {{r[0-9]}}, [[IM]]
+entry:
+ %cmpLow = icmp slt i32 %x, -1
+ %saturateLow = select i1 %cmpLow, i32 -1, i32 %x
+ ret i32 %saturateLow
+}
+
+; x < -1 ? -1 : x
+; 16-bit base test
+define i16 @sat1_base_16bit(i16 %x) #0 {
+; CHECK-LABEL: sat1_base_16bit:
+; CHECK-ARM: cmn
+; CHECK-T2: cmp
+; CHECK-T: cmp
+entry:
+ %cmpLow = icmp slt i16 %x, -1
+ %saturateLow = select i1 %cmpLow, i16 -1, i16 %x
+ ret i16 %saturateLow
+}
+
+; x < -1 ? -1 : x
+; 8-bit base test
+define i8 @sat1_base_8bit(i8 %x) #0 {
+; CHECK-LABEL: sat1_base_8bit:
+; CHECK-ARM: cmn
+; CHECK-T2: cmp
+; CHECK-T: cmp
+entry:
+ %cmpLow = icmp slt i8 %x, -1
+ %saturateLow = select i1 %cmpLow, i8 -1, i8 %x
+ ret i8 %saturateLow
+}
+
+; Test where the conditional is formed in a different way
+
+; x > -1 ? x : -1
+define i32 @sat1_lower_1(i32 %x) #0 {
+; CHECK-LABEL: sat1_lower_1:
+; CHECK-ARM: orr {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T2: orr.w {{r[0-9]}}, [[INPUT:r[0-9]]], [[INPUT]], asr #31
+; CHECK-T: asrs [[IM:r[0-9]]], {{r[0-9]}}, #31
+; CHECK-T-NEXT: orrs {{r[0-9]}}, [[IM]]
+; CHECK-CMP-NOT: cmp
+entry:
+ %cmpGt = icmp sgt i32 %x, -1
+ %saturateLow = select i1 %cmpGt, i32 %x, i32 -1
+ ret i32 %saturateLow
+}
+
+; The following tests for patterns that should not transform into bitops
+; but that are similar enough that could confuse the selector.
+
+; x < 0 ? 0 : y where x and y does not properly match
+define i32 @no_sat0_incorrect_variable(i32 %x, i32 %y) #0 {
+; CHECK-LABEL: no_sat0_incorrect_variable:
+; CHECK-NOT: bic
+; CHECK-NOT: asrs
+; CHECK-CMP: cmp
+entry:
+ %cmpLow = icmp slt i32 %x, 0
+ %saturateLow = select i1 %cmpLow, i32 0, i32 %y
+ ret i32 %saturateLow
+}
+
+; x < 0 ? -1 : x
+define i32 @no_sat0_incorrect_constant(i32 %x) #0 {
+; CHECK-LABEL: no_sat0_incorrect_constant:
+; CHECK-NOT: bic
+; CHECK-NOT: asrs
+; CHECK-CMP: cmp
+entry:
+ %cmpLow = icmp slt i32 %x, 0
+ %saturateLow = select i1 %cmpLow, i32 -1, i32 %x
+ ret i32 %saturateLow
+}
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