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-rw-r--r--llvm/test/CodeGen/ARM/ror.ll13
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/ARM/ror.ll b/llvm/test/CodeGen/ARM/ror.ll
index 0f699a8dd29..7a8c5fd1e0c 100644
--- a/llvm/test/CodeGen/ARM/ror.ll
+++ b/llvm/test/CodeGen/ARM/ror.ll
@@ -1,10 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s
; rotr (rotr x, 4), 6 -> rotr x, 10 -> ror r0, r0, #10
define i32 @test1(i32 %x) nounwind readnone {
; CHECK-LABEL: test1:
-; CHECK: ror r0, r0, #10
-; CHECK: bx lr
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: ror r0, r0, #10
+; CHECK-NEXT: bx lr
entry:
%high_part.i = shl i32 %x, 28
%low_part.i = lshr i32 %x, 4
@@ -18,9 +20,10 @@ entry:
; the same vector test
define <2 x i32> @test2(<2 x i32> %x) nounwind readnone {
; CHECK-LABEL: test2:
-; CHECK: ror r0, r0, #10
-; CHECK: ror r1, r1, #10
-; CHECK: bx lr
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: ror r0, r0, #10
+; CHECK-NEXT: ror r1, r1, #10
+; CHECK-NEXT: bx lr
entry:
%high_part.i = shl <2 x i32> %x, <i32 28, i32 28>
%low_part.i = lshr <2 x i32> %x, <i32 4, i32 4>
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