diff options
Diffstat (limited to 'llvm/test/CodeGen/ARM/and-setcc.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/and-setcc.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/and-setcc.ll b/llvm/test/CodeGen/ARM/and-setcc.ll new file mode 100644 index 00000000000..6dd6a446c7a --- /dev/null +++ b/llvm/test/CodeGen/ARM/and-setcc.ll @@ -0,0 +1,36 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s + +define zeroext i1 @ne_neg1_and_ne_zero(i32 %x) nounwind { +; CHECK-LABEL: ne_neg1_and_ne_zero: +; CHECK: @ BB#0: +; CHECK-NEXT: add r1, r0, #1 +; CHECK-NEXT: mov r0, #0 +; CHECK-NEXT: cmp r1, #1 +; CHECK-NEXT: movwhi r0, #1 +; CHECK-NEXT: bx lr + %cmp1 = icmp ne i32 %x, -1 + %cmp2 = icmp ne i32 %x, 0 + %and = and i1 %cmp1, %cmp2 + ret i1 %and +} + +; PR32401 - https://bugs.llvm.org/show_bug.cgi?id=32401 + +define zeroext i1 @cmpeq_logical(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { +; CHECK-LABEL: cmpeq_logical: +; CHECK: @ BB#0: +; CHECK-NEXT: cmp r2, r3 +; CHECK-NEXT: mov r2, #0 +; CHECK-NEXT: movweq r2, #1 +; CHECK-NEXT: mov r12, #0 +; CHECK-NEXT: cmp r0, r1 +; CHECK-NEXT: movweq r12, #1 +; CHECK-NEXT: and r0, r12, r2 +; CHECK-NEXT: bx lr + %cmp1 = icmp eq i32 %a, %b + %cmp2 = icmp eq i32 %c, %d + %and = and i1 %cmp1, %cmp2 + ret i1 %and +} + |
