diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/salu-to-valu.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll index f92b53db2a8..eebd06e6ee9 100644 --- a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll +++ b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll @@ -431,5 +431,33 @@ entry: ret void } +; Make sure we legalize vopc operands after moving an sopc to the value. + +; {{^}}sopc_vopc_legalize_bug: +; GCN: s_load_dword [[SGPR:s[0-9]+]] +; GCN: v_cmp_le_u32_e32 vcc, [[SGPR]], v{{[0-9]+}} +; GCN: s_and_b64 vcc, exec, vcc +; GCN: s_cbranch_vccnz [[EXIT:[A-Z0-9_]+]] +; GCN: v_mov_b32_e32 [[ONE:v[0-9]+]], 1 +; GCN-NOHSA: buffer_store_dword [[ONE]] +; GCN-HSA: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[ONE]] +; GCN; {{^}}[[EXIT]]: +; GCN: s_endpgm +define void @sopc_vopc_legalize_bug(i32 %cond, i32 addrspace(1)* %out, i32 addrspace(1)* %in) { +bb3: ; preds = %bb2 + %tmp0 = bitcast i32 %cond to float + %tmp1 = fadd float %tmp0, 2.500000e-01 + %tmp2 = bitcast float %tmp1 to i32 + %tmp3 = icmp ult i32 %tmp2, %cond + br i1 %tmp3, label %bb6, label %bb7 + +bb6: + store i32 1, i32 addrspace(1)* %out + br label %bb7 + +bb7: ; preds = %bb3 + ret void +} + attributes #0 = { nounwind readnone } attributes #1 = { nounwind } |
