diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll index a007c965f94..48dbb28b4a2 100644 --- a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll +++ b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll @@ -13,7 +13,7 @@ ; IR-NEXT: %phi.broken = phi i64 [ %3, %bb10 ], [ 0, %bb ] ; IR-NEXT: %tmp6 = phi i32 [ 0, %bb ], [ %tmp11, %bb10 ] ; IR-NEXT: %tmp7 = icmp eq i32 %tmp6, 1 -; IR-NEXT: %0 = call { i1, i64 } @llvm.amdgcn.if(i1 %tmp7) +; IR-NEXT: %0 = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %tmp7) ; IR-NEXT: %1 = extractvalue { i1, i64 } %0, 0 ; IR-NEXT: %2 = extractvalue { i1, i64 } %0, 1 ; IR-NEXT: br i1 %1, label %bb8, label %Flow @@ -24,14 +24,14 @@ ; IR: bb10: ; IR-NEXT: %tmp11 = phi i32 [ %6, %Flow ] ; IR-NEXT: %tmp12 = phi i1 [ %5, %Flow ] -; IR-NEXT: %3 = call i64 @llvm.amdgcn.if.break(i1 %tmp12, i64 %phi.broken) -; IR-NEXT: %4 = call i1 @llvm.amdgcn.loop(i64 %3) +; IR-NEXT: %3 = call i64 @llvm.amdgcn.if.break.i64.i64(i1 %tmp12, i64 %phi.broken) +; IR-NEXT: %4 = call i1 @llvm.amdgcn.loop.i64(i64 %3) ; IR-NEXT: br i1 %4, label %bb23, label %bb5 ; IR: Flow: ; IR-NEXT: %5 = phi i1 [ %tmp22, %bb4 ], [ true, %bb5 ] ; IR-NEXT: %6 = phi i32 [ %tmp21, %bb4 ], [ undef, %bb5 ] -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %2) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %2) ; IR-NEXT: br label %bb10 ; IR: bb13: @@ -51,7 +51,7 @@ ; IR-NEXT: br label %bb9 ; IR: bb23: -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %3) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %3) ; IR-NEXT: ret void ; GCN-LABEL: {{^}}reduced_nested_loop_conditions: @@ -121,27 +121,27 @@ bb23: ; preds = %bb10 ; IR-LABEL: @nested_loop_conditions( ; IR: Flow3: -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %21) -; IR-NEXT: %0 = call { i1, i64 } @llvm.amdgcn.if(i1 %14) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %21) +; IR-NEXT: %0 = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %14) ; IR-NEXT: %1 = extractvalue { i1, i64 } %0, 0 ; IR-NEXT: %2 = extractvalue { i1, i64 } %0, 1 ; IR-NEXT: br i1 %1, label %bb4.bb13_crit_edge, label %Flow4 ; IR: Flow4: ; IR-NEXT: %3 = phi i1 [ true, %bb4.bb13_crit_edge ], [ false, %Flow3 ] -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %2) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %2) ; IR-NEXT: br label %Flow ; IR: Flow: ; IR-NEXT: %4 = phi i1 [ %3, %Flow4 ], [ true, %bb ] -; IR-NEXT: %5 = call { i1, i64 } @llvm.amdgcn.if(i1 %4) +; IR-NEXT: %5 = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %4) ; IR-NEXT: %6 = extractvalue { i1, i64 } %5, 0 ; IR-NEXT: %7 = extractvalue { i1, i64 } %5, 1 ; IR-NEXT: br i1 %6, label %bb13, label %bb31 ; IR: bb14: ; IR: %tmp15 = icmp eq i32 %tmp1037, 1 -; IR-NEXT: %8 = call { i1, i64 } @llvm.amdgcn.if(i1 %tmp15) +; IR-NEXT: %8 = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %tmp15) ; IR: Flow1: ; IR-NEXT: %11 = phi <4 x i32> [ %tmp9, %bb21 ], [ undef, %bb14 ] @@ -149,9 +149,9 @@ bb23: ; preds = %bb10 ; IR-NEXT: %13 = phi i1 [ %18, %bb21 ], [ true, %bb14 ] ; IR-NEXT: %14 = phi i1 [ %18, %bb21 ], [ false, %bb14 ] ; IR-NEXT: %15 = phi i1 [ false, %bb21 ], [ true, %bb14 ] -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %10) -; IR-NEXT: %16 = call i64 @llvm.amdgcn.if.break(i1 %13, i64 %phi.broken) -; IR-NEXT: %17 = call i1 @llvm.amdgcn.loop(i64 %16) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %10) +; IR-NEXT: %16 = call i64 @llvm.amdgcn.if.break.i64.i64(i1 %13, i64 %phi.broken) +; IR-NEXT: %17 = call i1 @llvm.amdgcn.loop.i64(i64 %16) ; IR-NEXT: br i1 %17, label %Flow2, label %bb14 ; IR: bb21: @@ -160,14 +160,14 @@ bb23: ; preds = %bb10 ; IR-NEXT: br label %Flow1 ; IR: Flow2: -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %16) -; IR-NEXT: %19 = call { i1, i64 } @llvm.amdgcn.if(i1 %15) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %16) +; IR-NEXT: %19 = call { i1, i64 } @llvm.amdgcn.if.i64(i1 %15) ; IR-NEXT: %20 = extractvalue { i1, i64 } %19, 0 ; IR-NEXT: %21 = extractvalue { i1, i64 } %19, 1 ; IR-NEXT: br i1 %20, label %bb31.loopexit, label %Flow3 ; IR: bb31: -; IR-NEXT: call void @llvm.amdgcn.end.cf(i64 %7) +; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 %7) ; IR-NEXT: store volatile i32 0, i32 addrspace(1)* undef ; IR-NEXT: ret void |
