diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll | 61 |
1 files changed, 43 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll b/llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll index 86d3fa4d8c4..204a067e143 100644 --- a/llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll +++ b/llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll @@ -2,12 +2,10 @@ ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI,VI %s ; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CIVI,CI %s -; FIXME: These cases should be able to use v_mad_mixhi_f16 and avoid -; the packing. - ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo: -; GFX9: v_mad_mixlo_f16 -; GFX9: v_lshl_or_b32 +; GFX9: s_waitcnt +; GFX9-NEXT: v_mad_mixhi_f16 v0, v0, v1, v2 +; GFX9-NEXT: s_setpc_b64 define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float %src1.ext = fpext half %src1 to float @@ -19,8 +17,11 @@ define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo(half %src0, half %s } ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_constlo: -; GFX9: v_mad_mixlo_f16 -; GFX9: v_lshl_or_b32 +; GFX9: s_waitcnt +; GFX9-NEXT: v_mov_b32_e32 v3, 0x3c00 +; GFX9-NEXT: v_mad_mixhi_f16 v3, v0, v1, v2 +; GFX9-NEXT: v_mov_b32_e32 v0, v3 +; GFX9-NEXT: s_setpc_b64 define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_constlo(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float %src1.ext = fpext half %src1 to float @@ -32,8 +33,10 @@ define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_constlo(half %src0, half %s } ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_reglo: -; GFX9: v_mad_mixlo_f16 -; GFX9: v_lshl_or_b32 +; GFX9: s_waitcnt +; GFX9-NEXT: v_mad_mixhi_f16 v3, v0, v1, v2 +; GFX9-NEXT: v_mov_b32_e32 v0, v3 +; GFX9-NEXT: s_setpc_b64 define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_reglo(half %src0, half %src1, half %src2, half %lo) #0 { %src0.ext = fpext half %src0 to float %src1.ext = fpext half %src1 to float @@ -46,8 +49,10 @@ define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_reglo(half %src0, half %src } ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_intpack: -; GFX9: v_mad_mixlo_f16 v0, v0, v1, v2 -; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; GFX9: v_mov_b32_e32 v3, 0 +; GFX9-NEXT: v_mad_mixhi_f16 v3, v0, v1, v2 +; GFX9-NEXT: v_mov_b32_e32 v0, v3 +; GFX9-NEXT: s_setpc_b64 define i32 @v_mad_mixhi_f16_f16lo_f16lo_f16lo_intpack(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float %src1.ext = fpext half %src1 to float @@ -61,8 +66,10 @@ define i32 @v_mad_mixhi_f16_f16lo_f16lo_f16lo_intpack(half %src0, half %src1, ha } ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_intpack_sext: -; GFX9: v_mad_mixlo_f16 v0, v0, v1, v2 -; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; GFX9: v_mov_b32_e32 v3, 0 +; GFX9-NEXT: v_mad_mixhi_f16 v3, v0, v1, v2 +; GFX9-NEXT: v_mov_b32_e32 v0, v3 +; GFX9-NEXT: s_setpc_b64 define i32 @v_mad_mixhi_f16_f16lo_f16lo_f16lo_intpack_sext(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float %src1.ext = fpext half %src1 to float @@ -90,12 +97,9 @@ define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_precvt(half % ret <2 x half> %vec.result } -; FIXME: Unnecessary junk to pack, and packing undef? ; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_postcvt: -; GFX9: v_mad_mixlo_f16 v0, v0, v1, v2 clamp{{$}} -; GFX9-NEXT: v_mov_b32_e32 [[MASK:v[0-9]+]], 0xffff{{$}} -; GFX9-NEXT: v_and_b32_e32 [[AND:v[0-9]+]], s6, [[MASK]] -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, [[AND]] +; GCN: s_waitcnt +; GFX9-NEXT: v_mad_mixhi_f16 v0, v0, v1, v2 clamp{{$}} ; GFX9-NEXT: s_setpc_b64 define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_postcvt(half %src0, half %src1, half %src2) #0 { %src0.ext = fpext half %src0 to float @@ -109,6 +113,27 @@ define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_postcvt(half ret <2 x half> %vec.result } + +; GCN-LABEL: {{^}}v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_postcvt_multi_use: +; GCN: s_waitcnt +; GFX9-NEXT: v_mad_mixlo_f16 v3, v0, v1, v2{{$}} +; GFX9-NEXT: global_store_short v{{\[[0-9]+:[0-9]+\]}}, v3 +; GFX9-NEXT: v_mad_mixhi_f16 v0, v0, v1, v2 clamp{{$}} +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: s_setpc_b64 +define <2 x half> @v_mad_mixhi_f16_f16lo_f16lo_f16lo_undeflo_clamp_postcvt_multi_use(half %src0, half %src1, half %src2) #0 { + %src0.ext = fpext half %src0 to float + %src1.ext = fpext half %src1 to float + %src2.ext = fpext half %src2 to float + %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext) + %cvt.result = fptrunc float %result to half + store volatile half %cvt.result, half addrspace(1)* undef + %max = call half @llvm.maxnum.f16(half %cvt.result, half 0.0) + %clamp = call half @llvm.minnum.f16(half %max, half 1.0) + %vec.result = insertelement <2 x half> undef, half %clamp, i32 1 + ret <2 x half> %vec.result +} + declare half @llvm.minnum.f16(half, half) #1 declare half @llvm.maxnum.f16(half, half) #1 declare float @llvm.minnum.f32(float, float) #1 |
