1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
index c9c9ef167c4..792ce80f45c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
@@ -3,7 +3,7 @@
 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
 
-declare float @llvm.amdgcn.fmad.ftz(float %a, float %b, float %c)
+declare float @llvm.amdgcn.fmad.ftz.f32(float %a, float %b, float %c)
 
 ; GCN-LABEL: {{^}}mad_f32:
 ; GCN:  v_ma{{[dc]}}_f32
@@ -15,7 +15,7 @@ define amdgpu_kernel void @mad_f32(
   %a.val = load float, float addrspace(1)* %a
   %b.val = load float, float addrspace(1)* %b
   %c.val = load float, float addrspace(1)* %c
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float %b.val, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -29,7 +29,7 @@ define amdgpu_kernel void @mad_f32_imm_a(
     float addrspace(1)* %c) {
   %b.val = load float, float addrspace(1)* %b
   %c.val = load float, float addrspace(1)* %c
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float 8.0, float %b.val, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float 8.0, float %b.val, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -43,7 +43,7 @@ define amdgpu_kernel void @mad_f32_imm_b(
     float addrspace(1)* %c) {
   %a.val = load float, float addrspace(1)* %a
   %c.val = load float, float addrspace(1)* %c
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float 8.0, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float 8.0, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -57,7 +57,7 @@ define amdgpu_kernel void @mad_f32_imm_c(
     float addrspace(1)* %b) {
   %a.val = load float, float addrspace(1)* %a
   %b.val = load float, float addrspace(1)* %b
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float %b.val, float 8.0)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float 8.0)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -73,7 +73,7 @@ define amdgpu_kernel void @mad_f32_neg_b(
   %b.val = load float, float addrspace(1)* %b
   %c.val = load float, float addrspace(1)* %c
   %neg.b = fsub float -0.0, %b.val
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float %neg.b, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.b, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -89,7 +89,7 @@ define amdgpu_kernel void @mad_f32_abs_b(
   %b.val = load float, float addrspace(1)* %b
   %c.val = load float, float addrspace(1)* %c
   %abs.b = call float @llvm.fabs.f32(float %b.val)
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float %abs.b, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %abs.b, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }
@@ -106,7 +106,7 @@ define amdgpu_kernel void @mad_f32_neg_abs_b(
   %c.val = load float, float addrspace(1)* %c
   %abs.b = call float @llvm.fabs.f32(float %b.val)
   %neg.abs.b = fsub float -0.0, %abs.b
-  %r.val = call float @llvm.amdgcn.fmad.ftz(float %a.val, float %neg.abs.b, float %c.val)
+  %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.abs.b, float %c.val)
   store float %r.val, float addrspace(1)* %r
   ret void
 }