diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 36 |
1 files changed, 16 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll index 617204fdf33..aba0b63a254 100644 --- a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll +++ b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll @@ -1,20 +1,16 @@ -; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -amdgpu-spill-sgpr-to-smem=0 -verify-machineinstrs < %s | FileCheck -check-prefix=TOSGPR -check-prefix=ALL %s -; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -amdgpu-spill-sgpr-to-smem=1 -verify-machineinstrs < %s | FileCheck -check-prefix=TOSMEM -check-prefix=ALL %s +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s -; If spilling to smem, additional registers are used for the resource -; descriptor. - -; ALL-LABEL: {{^}}max_14_sgprs: +; CHECK-LABEL: {{^}}max_14_sgprs: ; FIXME: Should be ablo to skip this copying of the private segment ; buffer because all the SGPR spills are to VGPRs. -; ALL: s_mov_b64 s[6:7], s[2:3] -; ALL: s_mov_b64 s[4:5], s[0:1] -; ALL: SGPRBlocks: 1 -; ALL: NumSGPRsForWavesPerEU: 14 -define void @max_14_sgprs(i32 addrspace(1)* %out1, +; CHECK: s_mov_b64 s[6:7], s[2:3] +; CHECK: s_mov_b64 s[4:5], s[0:1] +; CHECK: SGPRBlocks: 1 +; CHECK: NumSGPRsForWavesPerEU: 14 +define void @max_14_sgprs(i32 addrspace(1)* %out1, i32 addrspace(1)* %out2, i32 addrspace(1)* %out3, i32 addrspace(1)* %out4, @@ -35,7 +31,7 @@ define void @max_14_sgprs(i32 addrspace(1)* %out1, ; --------------------- ; total: 14 -; + reserved vcc, xnack, flat_scratch = 20 +; + reserved vcc, flat_scratch = 18 ; Because we can't handle re-using the last few input registers as the ; special vcc etc. registers (as well as decide to not use the unused @@ -44,14 +40,14 @@ define void @max_14_sgprs(i32 addrspace(1)* %out1, ; ALL-LABEL: {{^}}max_12_sgprs_14_input_sgprs: ; TOSGPR: SGPRBlocks: 2 -; TOSGPR: NumSGPRsForWavesPerEU: 20 +; TOSGPR: NumSGPRsForWavesPerEU: 18 ; TOSMEM: s_mov_b64 s[6:7], s[2:3] +; TOSMEM: s_mov_b32 s9, s13 ; TOSMEM: s_mov_b64 s[4:5], s[0:1] -; TOSMEM: s_mov_b32 s3, s13 ; TOSMEM: SGPRBlocks: 2 -; TOSMEM: NumSGPRsForWavesPerEU: 20 +; TOSMEM: NumSGPRsForWavesPerEU: 18 define void @max_12_sgprs_14_input_sgprs(i32 addrspace(1)* %out1, i32 addrspace(1)* %out2, i32 addrspace(1)* %out3, @@ -83,12 +79,12 @@ define void @max_12_sgprs_14_input_sgprs(i32 addrspace(1)* %out1, ; ; swapping the order the registers are copied from what normally ; ; happens. -; TOSMEM: s_mov_b32 s5, s11 -; TOSMEM: s_add_u32 m0, s5, -; TOSMEM: s_buffer_store_dword vcc_lo, s[0:3], m0 +; TOSMEM: s_mov_b64 s[6:7], s[2:3] +; TOSMEM: s_mov_b64 s[4:5], s[0:1] +; TOSMEM: s_mov_b32 s3, s11 -; ALL: SGPRBlocks: 2 -; ALL: NumSGPRsForWavesPerEU: 18 +; ALL: SGPRBlocks: 1 +; ALL: NumSGPRsForWavesPerEU: 16 define void @max_12_sgprs_12_input_sgprs(i32 addrspace(1)* %out1, i32 addrspace(1)* %out2, i32 addrspace(1)* %out3, |
