diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir index cb4ebabb586..d2fa37f05d9 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir @@ -42,7 +42,7 @@ body: | ; GCN-LABEL: name: test_merge_values_v_s64_s_s32_v_s32 ; GCN: liveins: $sgpr0, $vgpr0 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1 ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]] @@ -65,7 +65,7 @@ body: | ; GCN-LABEL: name: test_merge_values_v_s64_v_s32_s_s32 ; GCN: liveins: $sgpr0, $vgpr0 ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 - ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 + ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1 ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]] %0:vgpr(s32) = COPY $vgpr0 @@ -86,8 +86,8 @@ body: | ; GCN-LABEL: name: test_merge_values_s_s64_s_s32_s_s32 ; GCN: liveins: $sgpr0, $sgpr1 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr1 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1 ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]] %0:sgpr(s32) = COPY $sgpr0 @@ -108,8 +108,8 @@ body: | ; GCN-LABEL: name: test_merge_values_s_s64_undef_s_s32_s_s32 ; GCN: liveins: $sgpr0 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE undef %2:sreg_32_xm0, %subreg.sub0, [[COPY]], %subreg.sub1 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE undef %2:sreg_32, %subreg.sub0, [[COPY]], %subreg.sub1 ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]] %1:sgpr(s32) = COPY $sgpr0 %2:sgpr(s64) = G_MERGE_VALUES undef %0:sgpr(s32), %1 @@ -128,8 +128,8 @@ body: | ; GCN-LABEL: name: test_merge_values_s_s64_s_s32_undef_s_s32 ; GCN: liveins: $sgpr0 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[COPY]], %subreg.sub0, undef %2:sreg_32_xm0, %subreg.sub1 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[COPY]], %subreg.sub0, undef %2:sreg_32, %subreg.sub1 ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]] %0:sgpr(s32) = COPY $sgpr0 %2:sgpr(s64) = G_MERGE_VALUES %0, undef %1:sgpr(s32), @@ -146,9 +146,9 @@ body: | liveins: $sgpr0, $sgpr1, $sgpr2 ; GCN-LABEL: name: test_merge_values_s_s96_s_s32_s_s32_s_s32 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr1 - ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr2 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 + ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_96 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2 ; GCN: $sgpr0_sgpr1_sgpr2 = COPY [[REG_SEQUENCE]] %0:sgpr(s32) = COPY $sgpr0 @@ -194,10 +194,10 @@ body: | ; GCN-LABEL: name: test_merge_values_s_s128_s_s32_s_s32_s_s32_s_s32 ; GCN: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr1 - ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr2 - ; GCN: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr3 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 + ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 + ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 ; GCN: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[REG_SEQUENCE]] %0:sgpr(s32) = COPY $sgpr0 @@ -290,11 +290,11 @@ body: | ; GCN-LABEL: name: test_merge_values_s_s160_s_s32_s_s32_s_s32_s_s32_s_s32 ; GCN: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4 - ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 - ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr1 - ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr2 - ; GCN: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr3 - ; GCN: [[COPY4:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr4 + ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 + ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 + ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 + ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 + ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr4 ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_160 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3, [[COPY4]], %subreg.sub4 ; GCN: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 = COPY [[REG_SEQUENCE]] %0:sgpr(s32) = COPY $sgpr0 |
