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-rw-r--r--llvm/test/CodeGen/AArch64/align-down.ll3
-rw-r--r--llvm/test/CodeGen/AArch64/sub-of-bias.ll12
2 files changed, 5 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/AArch64/align-down.ll b/llvm/test/CodeGen/AArch64/align-down.ll
index 4ad4d115157..659b69ca27b 100644
--- a/llvm/test/CodeGen/AArch64/align-down.ll
+++ b/llvm/test/CodeGen/AArch64/align-down.ll
@@ -127,8 +127,7 @@ define i32 @n8_not_lowbit_mask(i32 %ptr, i32 %alignment) nounwind {
; CHECK-LABEL: n8_not_lowbit_mask:
; CHECK: // %bb.0:
; CHECK-NEXT: add w8, w1, #1 // =1
-; CHECK-NEXT: and w8, w0, w8
-; CHECK-NEXT: sub w0, w0, w8
+; CHECK-NEXT: bic w0, w0, w8
; CHECK-NEXT: ret
%mask = add i32 %alignment, 1 ; not -1
%bias = and i32 %ptr, %mask
diff --git a/llvm/test/CodeGen/AArch64/sub-of-bias.ll b/llvm/test/CodeGen/AArch64/sub-of-bias.ll
index 8a80ff8d7b6..17b548cbeab 100644
--- a/llvm/test/CodeGen/AArch64/sub-of-bias.ll
+++ b/llvm/test/CodeGen/AArch64/sub-of-bias.ll
@@ -17,8 +17,7 @@
define i32 @t0_32(i32 %ptr, i32 %mask) nounwind {
; CHECK-LABEL: t0_32:
; CHECK: // %bb.0:
-; CHECK-NEXT: and w8, w0, w1
-; CHECK-NEXT: sub w0, w0, w8
+; CHECK-NEXT: bic w0, w0, w1
; CHECK-NEXT: ret
%bias = and i32 %ptr, %mask
%r = sub i32 %ptr, %bias
@@ -27,8 +26,7 @@ define i32 @t0_32(i32 %ptr, i32 %mask) nounwind {
define i64 @t1_64(i64 %ptr, i64 %mask) nounwind {
; CHECK-LABEL: t1_64:
; CHECK: // %bb.0:
-; CHECK-NEXT: and x8, x0, x1
-; CHECK-NEXT: sub x0, x0, x8
+; CHECK-NEXT: bic x0, x0, x1
; CHECK-NEXT: ret
%bias = and i64 %ptr, %mask
%r = sub i64 %ptr, %bias
@@ -38,8 +36,7 @@ define i64 @t1_64(i64 %ptr, i64 %mask) nounwind {
define i32 @t2_commutative(i32 %ptr, i32 %mask) nounwind {
; CHECK-LABEL: t2_commutative:
; CHECK: // %bb.0:
-; CHECK-NEXT: and w8, w1, w0
-; CHECK-NEXT: sub w0, w0, w8
+; CHECK-NEXT: bic w0, w0, w1
; CHECK-NEXT: ret
%bias = and i32 %mask, %ptr ; swapped
%r = sub i32 %ptr, %bias
@@ -87,8 +84,7 @@ define i32 @n5_different_ptrs_commutative(i32 %ptr0, i32 %ptr1, i32 %mask) nounw
define i32 @n6_not_lowbit_mask(i32 %ptr, i32 %mask) nounwind {
; CHECK-LABEL: n6_not_lowbit_mask:
; CHECK: // %bb.0:
-; CHECK-NEXT: and w8, w0, w1
-; CHECK-NEXT: sub w0, w0, w8
+; CHECK-NEXT: bic w0, w0, w1
; CHECK-NEXT: ret
%bias = and i32 %ptr, %mask
%r = sub i32 %ptr, %bias
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