diff options
Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll b/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll index a7d92153f51..aa47aeb9db5 100644 --- a/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll +++ b/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll @@ -38,11 +38,11 @@ entry: define i64 @jscall_patchpoint_codegen2(i64 %callee) { entry: ; CHECK-LABEL: jscall_patchpoint_codegen2: -; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6 +; CHECK: mov w[[REG:[0-9]+]], #6 ; CHECK-NEXT: str x[[REG]], [sp, #24] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #4 ; CHECK-NEXT: str w[[REG]], [sp, #16] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #2 ; CHECK-NEXT: str x[[REG]], [sp] ; CHECK: Ltmp ; CHECK-NEXT: mov x16, #281470681743360 @@ -50,11 +50,11 @@ entry: ; CHECK-NEXT: movk x16, #48879 ; CHECK-NEXT: blr x16 ; FAST-LABEL: jscall_patchpoint_codegen2: -; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 +; FAST: mov [[REG1:x[0-9]+]], #2 ; FAST-NEXT: str [[REG1]], [sp] -; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 +; FAST-NEXT: mov [[REG2:w[0-9]+]], #4 ; FAST-NEXT: str [[REG2]], [sp, #16] -; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 +; FAST-NEXT: mov [[REG3:x[0-9]+]], #6 ; FAST-NEXT: str [[REG3]], [sp, #24] ; FAST: Ltmp ; FAST-NEXT: mov x16, #281470681743360 @@ -72,13 +72,13 @@ entry: ; CHECK-LABEL: jscall_patchpoint_codegen3: ; CHECK: mov w[[REG:[0-9]+]], #10 ; CHECK-NEXT: str x[[REG]], [sp, #48] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #8 ; CHECK-NEXT: str w[[REG]], [sp, #36] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #6 ; CHECK-NEXT: str x[[REG]], [sp, #24] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #4 ; CHECK-NEXT: str w[[REG]], [sp, #16] -; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 +; CHECK-NEXT: mov w[[REG:[0-9]+]], #2 ; CHECK-NEXT: str x[[REG]], [sp] ; CHECK: Ltmp ; CHECK-NEXT: mov x16, #281470681743360 @@ -86,13 +86,13 @@ entry: ; CHECK-NEXT: movk x16, #48879 ; CHECK-NEXT: blr x16 ; FAST-LABEL: jscall_patchpoint_codegen3: -; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 +; FAST: mov [[REG1:x[0-9]+]], #2 ; FAST-NEXT: str [[REG1]], [sp] -; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 +; FAST-NEXT: mov [[REG2:w[0-9]+]], #4 ; FAST-NEXT: str [[REG2]], [sp, #16] -; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 +; FAST-NEXT: mov [[REG3:x[0-9]+]], #6 ; FAST-NEXT: str [[REG3]], [sp, #24] -; FAST-NEXT: orr [[REG4:w[0-9]+]], wzr, #0x8 +; FAST-NEXT: mov [[REG4:w[0-9]+]], #8 ; FAST-NEXT: str [[REG4]], [sp, #36] ; FAST-NEXT: mov [[REG5:x[0-9]+]], #10 ; FAST-NEXT: str [[REG5]], [sp, #48] |
