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Diffstat (limited to 'llvm/test/CodeGen/AArch64/arm64-build-vector.ll')
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-build-vector.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
index 4bf15ea2393..9d324735049 100644
--- a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
@@ -5,7 +5,7 @@
define void @one_lane(i32* nocapture %out_int, i32 %skip0) nounwind {
; CHECK-LABEL: one_lane:
; CHECK: dup.16b v[[REG:[0-9]+]], wzr
-; CHECK-NEXT: ins.b v[[REG]][0], w1
+; CHECK-NEXT: mov.b v[[REG]][0], w1
; v and q are aliases, and str is preferred against st.16b when possible
; rdar://11246289
; CHECK: str q[[REG]], [x0]
@@ -22,10 +22,10 @@ define void @one_lane(i32* nocapture %out_int, i32 %skip0) nounwind {
; copy for lane zero.
define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
; CHECK-LABEL: foo:
-; CHECK-NOT: ins.s v0[0], v0[0]
-; CHECK: ins.s v0[1], v1[0]
-; CHECK: ins.s v0[2], v2[0]
-; CHECK: ins.s v0[3], v3[0]
+; CHECK-NOT: mov.s v0[0], v0[0]
+; CHECK: mov.s v0[1], v1[0]
+; CHECK: mov.s v0[2], v2[0]
+; CHECK: mov.s v0[3], v3[0]
; CHECK: ret
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float %b, i32 1
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