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-rw-r--r--llvm/test/Analysis/CostModel/X86/rem.ll42
1 files changed, 42 insertions, 0 deletions
diff --git a/llvm/test/Analysis/CostModel/X86/rem.ll b/llvm/test/Analysis/CostModel/X86/rem.ll
index c4db00e50ee..b68b55f1e76 100644
--- a/llvm/test/Analysis/CostModel/X86/rem.ll
+++ b/llvm/test/Analysis/CostModel/X86/rem.ll
@@ -6,6 +6,10 @@
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
+;
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mcpu=btver2 | FileCheck %s --check-prefixes=BTVER2
define i32 @srem() {
; CHECK-LABEL: 'srem'
@@ -27,6 +31,25 @@ define i32 @srem() {
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = srem <64 x i8> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; BTVER2-LABEL: 'srem'
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = srem i64 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2i64 = srem <2 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i64 = srem <4 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i64 = srem <8 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = srem i32 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i32 = srem <4 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i32 = srem <8 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i32 = srem <16 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i16 = srem <8 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i16 = srem <16 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i16 = srem <32 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = srem i8 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i8 = srem <16 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = srem <32 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = srem <64 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
%I64 = srem i64 undef, undef
%V2i64 = srem <2 x i64> undef, undef
%V4i64 = srem <4 x i64> undef, undef
@@ -70,6 +93,25 @@ define i32 @urem() {
; CHECK-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = urem <64 x i8> undef, undef
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; BTVER2-LABEL: 'urem'
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = urem i64 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2i64 = urem <2 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i64 = urem <4 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i64 = urem <8 x i64> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = urem i32 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4i32 = urem <4 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i32 = urem <8 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i32 = urem <16 x i32> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8i16 = urem <8 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i16 = urem <16 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i16 = urem <32 x i16> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = urem i8 undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16i8 = urem <16 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32i8 = urem <32 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 192 for instruction: %V64i8 = urem <64 x i8> undef, undef
+; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
%I64 = urem i64 undef, undef
%V2i64 = urem <2 x i64> undef, undef
%V4i64 = urem <4 x i64> undef, undef
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