diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonPatterns.td | 30 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 23 |
2 files changed, 26 insertions, 27 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td index c54be2f16f1..485e658e1c8 100644 --- a/llvm/lib/Target/Hexagon/HexagonPatterns.td +++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td @@ -344,6 +344,13 @@ multiclass MinMax_pats<InstHexagon PickT, InstHexagon PickS, (PickS CmpPred:$Vs, CmpPred:$Vt)>; } +// Bitcasts between same-size vector types are no-ops, except for the +// actual type change. +multiclass NopCast_pat<ValueType Ty1, ValueType Ty2, RegisterClass RC> { + def: Pat<(Ty1 (bitconvert (Ty2 RC:$Val))), (Ty1 RC:$Val)>; + def: Pat<(Ty2 (bitconvert (Ty1 RC:$Val))), (Ty2 RC:$Val)>; +} + // Frags for commonly used SDNodes. def Add: pf2<add>; def And: pf2<and>; def Sra: pf2<sra>; @@ -427,17 +434,18 @@ def: Pat<(f32 (bitconvert I32:$v)), (F32:$v)>; def: Pat<(i64 (bitconvert F64:$v)), (I64:$v)>; def: Pat<(f64 (bitconvert I64:$v)), (F64:$v)>; -multiclass Cast_pat<ValueType Ta, ValueType Tb, RegisterClass RC> { - def: Pat<(Tb (bitconvert (Ta RC:$Rs))), (Tb RC:$Rs)>; - def: Pat<(Ta (bitconvert (Tb RC:$Rs))), (Ta RC:$Rs)>; -} - -// Bit convert vector types to integers. -defm: Cast_pat<v4i8, i32, IntRegs>; -defm: Cast_pat<v2i16, i32, IntRegs>; -defm: Cast_pat<v8i8, i64, DoubleRegs>; -defm: Cast_pat<v4i16, i64, DoubleRegs>; -defm: Cast_pat<v2i32, i64, DoubleRegs>; +// Bit convert 32- and 64-bit types. +// All of these are bitcastable to one another: i32, v2i16, v4i8. +defm: NopCast_pat<i32, v2i16, IntRegs>; +defm: NopCast_pat<i32, v4i8, IntRegs>; +defm: NopCast_pat<v2i16, v4i8, IntRegs>; +// All of these are bitcastable to one another: i64, v2i32, v4i16, v8i8. +defm: NopCast_pat<i64, v2i32, DoubleRegs>; +defm: NopCast_pat<i64, v4i16, DoubleRegs>; +defm: NopCast_pat<i64, v8i8, DoubleRegs>; +defm: NopCast_pat<v2i32, v4i16, DoubleRegs>; +defm: NopCast_pat<v2i32, v8i8, DoubleRegs>; +defm: NopCast_pat<v4i16, v8i8, DoubleRegs>; // --(3) Extend/truncate ------------------------------------------------- diff --git a/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td b/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td index 32e2260de07..078a7135c55 100644 --- a/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td +++ b/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td @@ -160,23 +160,14 @@ let Predicates = [UseHVX] in { // Bitcasts between same-size vector types are no-ops, except for the // actual type change. -class Bitcast<ValueType ResTy, ValueType InpTy, RegisterClass RC> - : Pat<(ResTy (bitconvert (InpTy RC:$Val))), (ResTy RC:$Val)>; - let Predicates = [UseHVX] in { - def: Bitcast<VecI8, VecI16, HvxVR>; - def: Bitcast<VecI8, VecI32, HvxVR>; - def: Bitcast<VecI16, VecI8, HvxVR>; - def: Bitcast<VecI16, VecI32, HvxVR>; - def: Bitcast<VecI32, VecI8, HvxVR>; - def: Bitcast<VecI32, VecI16, HvxVR>; - - def: Bitcast<VecPI8, VecPI16, HvxWR>; - def: Bitcast<VecPI8, VecPI32, HvxWR>; - def: Bitcast<VecPI16, VecPI8, HvxWR>; - def: Bitcast<VecPI16, VecPI32, HvxWR>; - def: Bitcast<VecPI32, VecPI8, HvxWR>; - def: Bitcast<VecPI32, VecPI16, HvxWR>; + defm: NopCast_pat<VecI8, VecI16, HvxVR>; + defm: NopCast_pat<VecI8, VecI32, HvxVR>; + defm: NopCast_pat<VecI16, VecI32, HvxVR>; + + defm: NopCast_pat<VecPI8, VecPI16, HvxWR>; + defm: NopCast_pat<VecPI8, VecPI32, HvxWR>; + defm: NopCast_pat<VecPI16, VecPI32, HvxWR>; } let Predicates = [UseHVX] in { |
