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-rw-r--r--llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp3
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td33
2 files changed, 33 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 28e30769abc..21faa962a91 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -620,9 +620,6 @@ X86Operand *X86ATTAsmParser::ParseMemOperand(unsigned SegReg, SMLoc MemStart) {
bool X86ATTAsmParser::
ParseInstruction(StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
- // FIXME: This is not correct at all.
- if (Name == "movzx") Name = "movzb";
-
StringRef PatchedName = Name;
// FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index ab9869abc5c..f5463c0d6ab 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -1259,6 +1259,10 @@ include "X86InstrCompiler.td"
//===----------------------------------------------------------------------===//
// movsx aliases
+def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
+ "movsx $src, $dst",
+ (MOVSX16rr8W GR16:$dst, GR8:$src)>;
+
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX32rr8 GR32:$dst, GR8:$src)>;
@@ -1266,6 +1270,35 @@ def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
"movsx $src, $dst",
(MOVSX32rr16 GR32:$dst, GR16:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
+ "movsx $src, $dst",
+ (MOVSX64rr8 GR64:$dst, GR8:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
+ "movsx $src, $dst",
+ (MOVSX64rr16 GR64:$dst, GR16:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
+ "movsx $src, $dst",
+ (MOVSX64rr32 GR64:$dst, GR32:$src)>;
+
+// movzx aliases
+def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX16rr8W GR16:$dst, GR8:$src)>;
+
+def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX32rr8 GR32:$dst, GR8:$src)>;
+def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
+ "movzx $src, $dst",
+ (MOVZX32rr16 GR32:$dst, GR16:$src)>;
+
+def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
+ "movzx $src, $dst",
+ (MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
+def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
+ "movzx $src, $dst",
+ (MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
+// Note: No GR32->GR64 movzx form.
// TODO: lidtl/lidtq can be opcode aliases, perhaps others.
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