diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 27 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MIMGInstructions.td | 163 |
3 files changed, 119 insertions, 82 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 1885b5958e8..9e2957e9c1a 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -1053,6 +1053,7 @@ private: bool validateEarlyClobberLimitations(const MCInst &Inst); bool validateIntClampSupported(const MCInst &Inst); bool validateMIMGAtomicDMask(const MCInst &Inst); + bool validateMIMGGatherDMask(const MCInst &Inst); bool validateMIMGDataSize(const MCInst &Inst); bool validateMIMGR128(const MCInst &Inst); bool validateMIMGD16(const MCInst &Inst); @@ -2299,7 +2300,7 @@ bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst) { if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0) return true; - // Gather4 instructions seem to have special rules not described in spec. + // Gather4 instructions do not need validation: dst size is hardcoded. if (Desc.TSFlags & SIInstrFlags::Gather4) return true; @@ -2345,6 +2346,25 @@ bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) { return DMask == 0x1 || DMask == 0x3 || DMask == 0xf; } +bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) { + + const unsigned Opc = Inst.getOpcode(); + const MCInstrDesc &Desc = MII.get(Opc); + + if ((Desc.TSFlags & SIInstrFlags::Gather4) == 0) + return true; + + int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask); + unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf; + + // GATHER4 instructions use dmask in a different fashion compared to + // other MIMG instructions. The only useful DMASK values are + // 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns + // (red,red,red,red) etc.) The ISA document doesn't mention + // this. + return DMask == 0x1 || DMask == 0x2 || DMask == 0x4 || DMask == 0x8; +} + bool AMDGPUAsmParser::validateMIMGR128(const MCInst &Inst) { const unsigned Opc = Inst.getOpcode(); @@ -2412,6 +2432,11 @@ bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, "invalid atomic image dmask"); return false; } + if (!validateMIMGGatherDMask(Inst)) { + Error(IDLoc, + "invalid image_gather dmask: only one bit must be set"); + return false; + } return true; } diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index 578fe50146e..75356e9a9d3 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -273,6 +273,11 @@ DecodeStatus AMDGPUDisassembler::convertSDWAInst(MCInst &MI) const { // Consequently, decoded instructions always show address // as if it has 1 dword, which could be not really so. DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const { + + if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::Gather4) { + return MCDisassembler::Success; + } + int VDstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst); @@ -289,7 +294,7 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const { assert(DMaskIdx != -1); assert(TFEIdx != -1); - bool isAtomic = (VDstIdx != -1); + bool IsAtomic = (VDstIdx != -1); unsigned DMask = MI.getOperand(DMaskIdx).getImm() & 0xf; if (DMask == 0) @@ -310,7 +315,7 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const { int NewOpcode = -1; - if (isAtomic) { + if (IsAtomic) { if (DMask == 0x1 || DMask == 0x3 || DMask == 0xF) { NewOpcode = AMDGPU::getMaskedMIMGAtomicOp(*MCII, MI.getOpcode(), DstSize); } @@ -342,7 +347,7 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const { // in the instruction encoding. MI.getOperand(VDataIdx) = MCOperand::createReg(NewVdata); - if (isAtomic) { + if (IsAtomic) { // Atomic operations have an additional operand (a copy of data) MI.getOperand(VDstIdx) = MCOperand::createReg(NewVdata); } diff --git a/llvm/lib/Target/AMDGPU/MIMGInstructions.td b/llvm/lib/Target/AMDGPU/MIMGInstructions.td index d31d33ab4de..a00cdaa8422 100644 --- a/llvm/lib/Target/AMDGPU/MIMGInstructions.td +++ b/llvm/lib/Target/AMDGPU/MIMGInstructions.td @@ -283,7 +283,10 @@ multiclass MIMG_Sampler_WQM <bits<7> op, string asm> : MIMG_Sampler<op, asm, 1>; class MIMG_Gather_Helper <bits<7> op, string asm, RegisterClass dst_rc, - RegisterClass src_rc, bit wqm, bit d16_bit=0> : MIMG < + RegisterClass src_rc, + bit wqm, + bit d16_bit=0, + string dns=""> : MIMG < (outs dst_rc:$vdata), (ins src_rc:$vaddr, SReg_256:$srsrc, SReg_128:$ssamp, dmask:$dmask, unorm:$unorm, GLC:$glc, slc:$slc, @@ -305,49 +308,37 @@ class MIMG_Gather_Helper <bits<7> op, string asm, let WQM = wqm; let D16 = d16; - let isAsmParserOnly = 1; // TBD: fix it later + let DecoderNamespace = dns; + let isAsmParserOnly = !if(!eq(dns,""), 1, 0); } -multiclass MIMG_Gather_Src_Helper_Helper <bits<7> op, string asm, +multiclass MIMG_Gather_Src_Helper <bits<7> op, string asm, RegisterClass dst_rc, - int channels, bit wqm, - bit d16_bit, string suffix> { - def _V1 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm, d16_bit>, - MIMG_Mask<asm#"_V1"#suffix, channels>; - def _V2 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_64, wqm, d16_bit>, - MIMG_Mask<asm#"_V2"#suffix, channels>; - def _V4 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_128, wqm, d16_bit>, - MIMG_Mask<asm#"_V4"#suffix, channels>; - def _V8 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_256, wqm, d16_bit>, - MIMG_Mask<asm#"_V8"#suffix, channels>; - def _V16 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_512, wqm, d16_bit>, - MIMG_Mask<asm#"_V16"#suffix, channels>; + bit wqm, bit d16_bit, + string prefix, + string suffix> { + def prefix # _V1 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VGPR_32, wqm, d16_bit, "AMDGPU">; + def prefix # _V2 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_64, wqm, d16_bit>; + def prefix # _V4 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_128, wqm, d16_bit>; + def prefix # _V8 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_256, wqm, d16_bit>; + def prefix # _V16 # suffix : MIMG_Gather_Helper <op, asm, dst_rc, VReg_512, wqm, d16_bit>; } -multiclass MIMG_Gather_Src_Helper <bits<7> op, string asm, - RegisterClass dst_rc, - int channels, bit wqm> { - defm : MIMG_Gather_Src_Helper_Helper<op, asm, dst_rc, channels, wqm, 0, "">; +multiclass MIMG_Gather <bits<7> op, string asm, bit wqm=0> { + defm : MIMG_Gather_Src_Helper<op, asm, VReg_128, wqm, 0, "_V4", "">; let d16 = 1 in { - let SubtargetPredicate = HasPackedD16VMem in { - defm : MIMG_Gather_Src_Helper_Helper<op, asm, dst_rc, channels, wqm, 1, "_D16">; + let AssemblerPredicate = HasPackedD16VMem in { + defm : MIMG_Gather_Src_Helper<op, asm, VReg_64, wqm, 1, "_V2", "_D16">; } // End HasPackedD16VMem. - let SubtargetPredicate = HasUnpackedD16VMem, DecoderNamespace = "GFX80_UNPACKED" in { - defm : MIMG_Gather_Src_Helper_Helper<op, asm, dst_rc, channels, wqm, 1, "_D16_gfx80">; + let AssemblerPredicate = HasUnpackedD16VMem, DecoderNamespace = "GFX80_UNPACKED" in { + defm : MIMG_Gather_Src_Helper<op, asm, VReg_128, wqm, 1, "_V4", "_D16_gfx80">; } // End HasUnpackedD16VMem. } // End d16 = 1. } -multiclass MIMG_Gather <bits<7> op, string asm, bit wqm=0> { - defm _V1 : MIMG_Gather_Src_Helper<op, asm, VGPR_32, 1, wqm>; - defm _V2 : MIMG_Gather_Src_Helper<op, asm, VReg_64, 2, wqm>; - defm _V3 : MIMG_Gather_Src_Helper<op, asm, VReg_96, 3, wqm>; - defm _V4 : MIMG_Gather_Src_Helper<op, asm, VReg_128, 4, wqm>; -} - multiclass MIMG_Gather_WQM <bits<7> op, string asm> : MIMG_Gather<op, asm, 1>; //===----------------------------------------------------------------------===// @@ -514,6 +505,22 @@ multiclass ImageSampleAltPatterns<SDPatternOperator name, string opcode> { } // End HasPackedD16VMem. } +// ImageGather4 patterns. +multiclass ImageGather4Patterns<SDPatternOperator name, string opcode> { + defm : ImageSampleDataPatterns<name, !cast<string>(opcode # _V4), v4f32>; +} + +// ImageGather4 alternative patterns for illegal vector half Types. +multiclass ImageGather4AltPatterns<SDPatternOperator name, string opcode> { + let SubtargetPredicate = HasUnpackedD16VMem in { + defm : ImageSampleDataPatterns<name, !cast<string>(opcode # _V4), v4i32, "_D16_gfx80">; + } // End HasUnpackedD16VMem. + + let SubtargetPredicate = HasPackedD16VMem in { + defm : ImageSampleDataPatterns<name, !cast<string>(opcode # _V2), v2i32, "_D16">; + } // End HasPackedD16VMem. +} + // ImageLoad for amdgcn. multiclass ImageLoadPattern<SDPatternOperator name, MIMG opcode, ValueType dt, ValueType vt> { def : GCNPat < @@ -695,36 +702,36 @@ defm : ImageSamplePatterns<int_amdgcn_image_sample_c_cd_o, "IMAGE_SAMPLE_C_CD defm : ImageSamplePatterns<int_amdgcn_image_sample_c_cd_cl_o, "IMAGE_SAMPLE_C_CD_CL_O">; // Basic gather4. -defm : ImageSamplePatterns<int_amdgcn_image_gather4, "IMAGE_GATHER4">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_cl, "IMAGE_GATHER4_CL">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_l, "IMAGE_GATHER4_L">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_b, "IMAGE_GATHER4_B">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_b_cl, "IMAGE_GATHER4_B_CL">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_lz, "IMAGE_GATHER4_LZ">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4, "IMAGE_GATHER4">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_cl, "IMAGE_GATHER4_CL">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_l, "IMAGE_GATHER4_L">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_b, "IMAGE_GATHER4_B">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_b_cl, "IMAGE_GATHER4_B_CL">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_lz, "IMAGE_GATHER4_LZ">; // Gather4 with comparison. -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c, "IMAGE_GATHER4_C">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_cl, "IMAGE_GATHER4_C_CL">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_l, "IMAGE_GATHER4_C_L">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_b, "IMAGE_GATHER4_C_B">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_b_cl, "IMAGE_GATHER4_C_B_CL">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_lz, "IMAGE_GATHER4_C_LZ">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c, "IMAGE_GATHER4_C">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_cl, "IMAGE_GATHER4_C_CL">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_l, "IMAGE_GATHER4_C_L">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_b, "IMAGE_GATHER4_C_B">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_b_cl, "IMAGE_GATHER4_C_B_CL">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_lz, "IMAGE_GATHER4_C_LZ">; // Gather4 with offsets. -defm : ImageSamplePatterns<int_amdgcn_image_gather4_o, "IMAGE_GATHER4_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_cl_o, "IMAGE_GATHER4_CL_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_l_o, "IMAGE_GATHER4_L_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_b_o, "IMAGE_GATHER4_B_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_b_cl_o, "IMAGE_GATHER4_B_CL_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_lz_o, "IMAGE_GATHER4_LZ_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_o, "IMAGE_GATHER4_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_cl_o, "IMAGE_GATHER4_CL_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_l_o, "IMAGE_GATHER4_L_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_b_o, "IMAGE_GATHER4_B_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_b_cl_o, "IMAGE_GATHER4_B_CL_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_lz_o, "IMAGE_GATHER4_LZ_O">; // Gather4 with comparison and offsets. -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_o, "IMAGE_GATHER4_C_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_cl_o, "IMAGE_GATHER4_C_CL_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_l_o, "IMAGE_GATHER4_C_L_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_b_o, "IMAGE_GATHER4_C_B_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_b_cl_o, "IMAGE_GATHER4_C_B_CL_O">; -defm : ImageSamplePatterns<int_amdgcn_image_gather4_c_lz_o, "IMAGE_GATHER4_C_LZ_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_o, "IMAGE_GATHER4_C_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_cl_o, "IMAGE_GATHER4_C_CL_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_l_o, "IMAGE_GATHER4_C_L_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_b_o, "IMAGE_GATHER4_C_B_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_b_cl_o, "IMAGE_GATHER4_C_B_CL_O">; +defm : ImageGather4Patterns<int_amdgcn_image_gather4_c_lz_o, "IMAGE_GATHER4_C_LZ_O">; // Basic sample alternative. defm : ImageSampleAltPatterns<SIImage_sample, "IMAGE_SAMPLE">; @@ -775,36 +782,36 @@ defm : ImageSampleAltPatterns<SIImage_sample_c_cd_o, "IMAGE_SAMPLE_C_CD_O">; defm : ImageSampleAltPatterns<SIImage_sample_c_cd_cl_o, "IMAGE_SAMPLE_C_CD_CL_O">; // Basic gather4 alternative. -defm : ImageSampleAltPatterns<SIImage_gather4, "IMAGE_GATHER4">; -defm : ImageSampleAltPatterns<SIImage_gather4_cl, "IMAGE_GATHER4_CL">; -defm : ImageSampleAltPatterns<SIImage_gather4_l, "IMAGE_GATHER4_L">; -defm : ImageSampleAltPatterns<SIImage_gather4_b, "IMAGE_GATHER4_B">; -defm : ImageSampleAltPatterns<SIImage_gather4_b_cl, "IMAGE_GATHER4_B_CL">; -defm : ImageSampleAltPatterns<SIImage_gather4_lz, "IMAGE_GATHER4_LZ">; +defm : ImageGather4AltPatterns<SIImage_gather4, "IMAGE_GATHER4">; +defm : ImageGather4AltPatterns<SIImage_gather4_cl, "IMAGE_GATHER4_CL">; +defm : ImageGather4AltPatterns<SIImage_gather4_l, "IMAGE_GATHER4_L">; +defm : ImageGather4AltPatterns<SIImage_gather4_b, "IMAGE_GATHER4_B">; +defm : ImageGather4AltPatterns<SIImage_gather4_b_cl, "IMAGE_GATHER4_B_CL">; +defm : ImageGather4AltPatterns<SIImage_gather4_lz, "IMAGE_GATHER4_LZ">; // Gather4 with comparison alternative. -defm : ImageSampleAltPatterns<SIImage_gather4_c, "IMAGE_GATHER4_C">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_cl, "IMAGE_GATHER4_C_CL">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_l, "IMAGE_GATHER4_C_L">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_b, "IMAGE_GATHER4_C_B">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_b_cl, "IMAGE_GATHER4_C_B_CL">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_lz, "IMAGE_GATHER4_C_LZ">; +defm : ImageGather4AltPatterns<SIImage_gather4_c, "IMAGE_GATHER4_C">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_cl, "IMAGE_GATHER4_C_CL">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_l, "IMAGE_GATHER4_C_L">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_b, "IMAGE_GATHER4_C_B">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_b_cl, "IMAGE_GATHER4_C_B_CL">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_lz, "IMAGE_GATHER4_C_LZ">; // Gather4 with offsets alternative. -defm : ImageSampleAltPatterns<SIImage_gather4_o, "IMAGE_GATHER4_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_cl_o, "IMAGE_GATHER4_CL_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_l_o, "IMAGE_GATHER4_L_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_b_o, "IMAGE_GATHER4_B_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_b_cl_o, "IMAGE_GATHER4_B_CL_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_lz_o, "IMAGE_GATHER4_LZ_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_o, "IMAGE_GATHER4_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_cl_o, "IMAGE_GATHER4_CL_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_l_o, "IMAGE_GATHER4_L_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_b_o, "IMAGE_GATHER4_B_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_b_cl_o, "IMAGE_GATHER4_B_CL_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_lz_o, "IMAGE_GATHER4_LZ_O">; // Gather4 with comparison and offsets alternative. -defm : ImageSampleAltPatterns<SIImage_gather4_c_o, "IMAGE_GATHER4_C_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_cl_o, "IMAGE_GATHER4_C_CL_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_l_o, "IMAGE_GATHER4_C_L_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_b_o, "IMAGE_GATHER4_C_B_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_b_cl_o, "IMAGE_GATHER4_C_B_CL_O">; -defm : ImageSampleAltPatterns<SIImage_gather4_c_lz_o, "IMAGE_GATHER4_C_LZ_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_o, "IMAGE_GATHER4_C_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_cl_o, "IMAGE_GATHER4_C_CL_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_l_o, "IMAGE_GATHER4_C_L_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_b_o, "IMAGE_GATHER4_C_B_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_b_cl_o, "IMAGE_GATHER4_C_B_CL_O">; +defm : ImageGather4AltPatterns<SIImage_gather4_c_lz_o, "IMAGE_GATHER4_C_LZ_O">; defm : ImageSamplePatterns<int_amdgcn_image_getlod, "IMAGE_GET_LOD">; |
