diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 31 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsRegisterInfo.td | 10 |
2 files changed, 2 insertions, 39 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index b8562b6ca77..277850c4deb 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -222,8 +222,6 @@ class MipsAsmParser : public MCTargetAsmParser { int matchCPURegisterName(StringRef Symbol); - int matchHWRegsRegisterName(StringRef Symbol); - int matchRegisterByNumber(unsigned RegNum, unsigned RegClass); int matchFPURegisterName(StringRef Name); @@ -861,14 +859,6 @@ public: return CreateReg(Index, RegKind_FGR, RegInfo, S, E, Parser); } - /// Create a register that is definitely a HWReg. - /// This is typically only used for named registers such as $hwr_cpunum. - static std::unique_ptr<MipsOperand> - createHWRegsReg(unsigned Index, const MCRegisterInfo *RegInfo, - SMLoc S, SMLoc E, MipsAsmParser &Parser) { - return CreateReg(Index, RegKind_HWRegs, RegInfo, S, E, Parser); - } - /// Create a register that is definitely an FCC. /// This is typically only used for named registers such as $fcc0. static std::unique_ptr<MipsOperand> @@ -1805,20 +1795,6 @@ int MipsAsmParser::matchCPURegisterName(StringRef Name) { return CC; } -int MipsAsmParser::matchHWRegsRegisterName(StringRef Name) { - int CC; - - CC = StringSwitch<unsigned>(Name) - .Case("hwr_cpunum", 0) - .Case("hwr_synci_step", 1) - .Case("hwr_cc", 2) - .Case("hwr_ccres", 3) - .Case("hwr_ulr", 29) - .Default(-1); - - return CC; -} - int MipsAsmParser::matchFPURegisterName(StringRef Name) { if (Name[0] == 'f') { @@ -2302,13 +2278,6 @@ MipsAsmParser::matchAnyRegisterNameWithoutDollar(OperandVector &Operands, return MatchOperand_Success; } - Index = matchHWRegsRegisterName(Identifier); - if (Index != -1) { - Operands.push_back(MipsOperand::createHWRegsReg( - Index, getContext().getRegisterInfo(), S, getLexer().getLoc(), *this)); - return MatchOperand_Success; - } - Index = matchFPURegisterName(Identifier); if (Index != -1) { Operands.push_back(MipsOperand::createFGRReg( diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.td b/llvm/lib/Target/Mips/MipsRegisterInfo.td index f3be37fb9c2..f20a90172a0 100644 --- a/llvm/lib/Target/Mips/MipsRegisterInfo.td +++ b/llvm/lib/Target/Mips/MipsRegisterInfo.td @@ -212,14 +212,8 @@ let Namespace = "Mips" in { // PC register def PC : Register<"pc">; - // Hardware registers - def HWR0 : MipsReg<0, "hwr_cpunum">; - def HWR1 : MipsReg<1, "hwr_synci_step">; - def HWR2 : MipsReg<2, "hwr_cc">; - def HWR3 : MipsReg<3, "hwr_ccres">; - def HWR29 : MipsReg<29, "hwr_ulr">; - - foreach I = {4-28,30-31} in + // Hardware register $29 + foreach I = 0-31 in def HWR#I : MipsReg<#I, ""#I>; // Accum registers |
