diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 17 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.cpp | 2 | 
3 files changed, 11 insertions, 24 deletions
| diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 7b560d173ed..e3da2084529 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -570,20 +570,13 @@ void ScheduleDAGFast::ListScheduleBottomUp() {            TRI->getMinimalPhysRegClass(Reg, VT);          const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); -        // If cross copy register class is the same as RC, then it must be -        // possible copy the value directly. Do not try duplicate the def. -        // If cross copy register class is not the same as RC, then it's -        // possible to copy the value but it require cross register class copies -        // and it is expensive. -        // If cross copy register class is null, then it's not possible to copy -        // the value at all. +        // If cross copy register class is null, then it must be possible copy +        // the value directly. Do not try duplicate the def.          SUnit *NewDef = 0; -        if (DestRC != RC) { +        if (DestRC)            NewDef = CopyAndMoveSuccessors(LRDef); -          if (!DestRC && !NewDef) -            report_fatal_error("Can't handle live physical " -                               "register dependency!"); -        } +        else +          DestRC = RC;          if (!NewDef) {            // Issue copies, these can be expensive cross register class copies.            SmallVector<SUnit*, 2> Copies; diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 5e60aa04eae..f1a5a6599b2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1140,19 +1140,13 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {        TRI->getMinimalPhysRegClass(Reg, VT);      const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); -    // If cross copy register class is the same as RC, then it must be possible -    // copy the value directly. Do not try duplicate the def. -    // If cross copy register class is not the same as RC, then it's possible to -    // copy the value but it require cross register class copies and it is -    // expensive. -    // If cross copy register class is null, then it's not possible to copy -    // the value at all. +    // If cross copy register class is null, then it must be possible copy +    // the value directly. Do not try duplicate the def.      SUnit *NewDef = 0; -    if (DestRC != RC) { +    if (DestRC)        NewDef = CopyAndMoveSuccessors(LRDef); -      if (!DestRC && !NewDef) -        report_fatal_error("Can't handle live physical register dependency!"); -    } +    else +      DestRC = RC;      if (!NewDef) {        // Issue copies, these can be expensive cross register class copies.        SmallVector<SUnit*, 2> Copies; diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp index 1f464f4be43..fe98cacb836 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -337,7 +337,7 @@ X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {      else        return &X86::GR32RegClass;    } -  return RC; +  return NULL;  }  unsigned | 

