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-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp9
-rw-r--r--llvm/lib/CodeGen/MachineOperand.cpp4
2 files changed, 4 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 9b38b893973..6b9da344166 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -785,7 +785,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
case MachineOperand::MO_Metadata:
case MachineOperand::MO_MCSymbol:
case MachineOperand::MO_CFIIndex:
- case MachineOperand::MO_IntrinsicID: {
+ case MachineOperand::MO_IntrinsicID:
+ case MachineOperand::MO_Predicate: {
unsigned TiedOperandIdx = 0;
if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
@@ -814,12 +815,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
printCustomRegMask(Op.getRegMask(), OS, TRI);
break;
}
- case MachineOperand::MO_Predicate: {
- auto Pred = static_cast<CmpInst::Predicate>(Op.getPredicate());
- OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
- << CmpInst::getPredicateName(Pred) << ')';
- break;
- }
}
}
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 586e826be58..fee99c91bbe 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -807,8 +807,8 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
case MachineOperand::MO_Predicate: {
auto Pred = static_cast<CmpInst::Predicate>(getPredicate());
- OS << '<' << (CmpInst::isIntPredicate(Pred) ? "intpred" : "floatpred")
- << CmpInst::getPredicateName(Pred) << '>';
+ OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
+ << CmpInst::getPredicateName(Pred) << ')';
break;
}
}
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