diff options
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/AsmParser/LLLexer.h | 2 | ||||
-rw-r--r-- | llvm/lib/Bitcode/Reader/BitcodeReader.h | 3 | ||||
-rw-r--r-- | llvm/lib/ExecutionEngine/JIT/JIT.h | 2 | ||||
-rw-r--r-- | llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Support/CommandLine.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMJITInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Alpha/AlphaJITInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/CBackend/CBackend.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86JITInfo.h | 2 | ||||
-rw-r--r-- | llvm/lib/VMCore/Verifier.cpp | 6 |
16 files changed, 19 insertions, 18 deletions
diff --git a/llvm/lib/AsmParser/LLLexer.h b/llvm/lib/AsmParser/LLLexer.h index 7eaa9f9d0ab..8b44b14cb74 100644 --- a/llvm/lib/AsmParser/LLLexer.h +++ b/llvm/lib/AsmParser/LLLexer.h @@ -30,7 +30,7 @@ namespace llvm { std::string TheError; public: - LLLexer(MemoryBuffer *StartBuf); + explicit LLLexer(MemoryBuffer *StartBuf); ~LLLexer() {} const char *getTokStart() const { return TokStart; } diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.h b/llvm/lib/Bitcode/Reader/BitcodeReader.h index 9a140d95241..86b00a5ef14 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.h +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.h @@ -117,7 +117,8 @@ class BitcodeReader : public ModuleProvider { /// stream) and what linkage the original function had. DenseMap<Function*, std::pair<uint64_t, unsigned> > DeferredFunctionInfo; public: - BitcodeReader(MemoryBuffer *buffer) : Buffer(buffer), ErrorString(0) { + explicit BitcodeReader(MemoryBuffer *buffer) + : Buffer(buffer), ErrorString(0) { HasReversedFunctionsWithBodies = false; } ~BitcodeReader() { diff --git a/llvm/lib/ExecutionEngine/JIT/JIT.h b/llvm/lib/ExecutionEngine/JIT/JIT.h index bf1e804cd41..69e301bf6d0 100644 --- a/llvm/lib/ExecutionEngine/JIT/JIT.h +++ b/llvm/lib/ExecutionEngine/JIT/JIT.h @@ -37,7 +37,7 @@ private: std::vector<const GlobalVariable*> PendingGlobals; public: - JITState(ModuleProvider *MP) : PM(MP) {} + explicit JITState(ModuleProvider *MP) : PM(MP) {} FunctionPassManager &getPM(const MutexGuard &L) { return PM; diff --git a/llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp b/llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp index b675811e437..8d5a94a50be 100644 --- a/llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp +++ b/llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp @@ -96,7 +96,7 @@ namespace { static JITResolver *TheJITResolver; public: - JITResolver(JIT &jit) : nextGOTIndex(0) { + explicit JITResolver(JIT &jit) : nextGOTIndex(0) { TheJIT = &jit; LazyResolverFn = jit.getJITInfo().getLazyResolverFunction(JITCompilerFn); diff --git a/llvm/lib/Support/CommandLine.cpp b/llvm/lib/Support/CommandLine.cpp index b3f32e89fbd..24f220d5136 100644 --- a/llvm/lib/Support/CommandLine.cpp +++ b/llvm/lib/Support/CommandLine.cpp @@ -931,7 +931,7 @@ class HelpPrinter { } public: - HelpPrinter(bool showHidden) : ShowHidden(showHidden) { + explicit HelpPrinter(bool showHidden) : ShowHidden(showHidden) { EmptyArg = 0; } diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.h b/llvm/lib/Target/ARM/ARMInstrInfo.h index 4ce90fc5664..29ec8be188f 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMInstrInfo.h @@ -128,7 +128,7 @@ namespace ARMII { class ARMInstrInfo : public TargetInstrInfoImpl { const ARMRegisterInfo RI; public: - ARMInstrInfo(const ARMSubtarget &STI); + explicit ARMInstrInfo(const ARMSubtarget &STI); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/ARM/ARMJITInfo.h b/llvm/lib/Target/ARM/ARMJITInfo.h index 20048793a8a..81d896b7f1a 100644 --- a/llvm/lib/Target/ARM/ARMJITInfo.h +++ b/llvm/lib/Target/ARM/ARMJITInfo.h @@ -22,7 +22,7 @@ namespace llvm { class ARMJITInfo : public TargetJITInfo { ARMTargetMachine &TM; public: - ARMJITInfo(ARMTargetMachine &tm) : TM(tm) {useGOT = 0;} + explicit ARMJITInfo(ARMTargetMachine &tm) : TM(tm) {useGOT = 0;} /// replaceMachineCodeForFunction - Make it so that calling the function /// whose machine code is at OLD turns into a call to NEW, perhaps by diff --git a/llvm/lib/Target/Alpha/AlphaJITInfo.h b/llvm/lib/Target/Alpha/AlphaJITInfo.h index a12f54698b5..29511694d84 100644 --- a/llvm/lib/Target/Alpha/AlphaJITInfo.h +++ b/llvm/lib/Target/Alpha/AlphaJITInfo.h @@ -26,7 +26,7 @@ namespace llvm { protected: TargetMachine &TM; public: - AlphaJITInfo(TargetMachine &tm) : TM(tm) + explicit AlphaJITInfo(TargetMachine &tm) : TM(tm) { useGOT = true; } virtual void *emitFunctionStub(void *Fn, MachineCodeEmitter &MCE); diff --git a/llvm/lib/Target/CBackend/CBackend.cpp b/llvm/lib/Target/CBackend/CBackend.cpp index 24ac8f9e5c0..b05c5696faa 100644 --- a/llvm/lib/Target/CBackend/CBackend.cpp +++ b/llvm/lib/Target/CBackend/CBackend.cpp @@ -90,7 +90,7 @@ namespace { public: static char ID; - CWriter(std::ostream &o) + explicit CWriter(std::ostream &o) : FunctionPass((intptr_t)&ID), Out(o), IL(0), Mang(0), LI(0), TheModule(0), TAsm(0), TD(0) {} diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.h b/llvm/lib/Target/CellSPU/SPUInstrInfo.h index c5fe811f6e5..dc492023bb5 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.h +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.h @@ -24,7 +24,7 @@ namespace llvm { SPUTargetMachine &TM; const SPURegisterInfo RI; public: - SPUInstrInfo(SPUTargetMachine &tm); + explicit SPUInstrInfo(SPUTargetMachine &tm); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.h b/llvm/lib/Target/Mips/MipsInstrInfo.h index a186f2cd796..9842414dbab 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.h +++ b/llvm/lib/Target/Mips/MipsInstrInfo.h @@ -46,7 +46,7 @@ class MipsInstrInfo : public TargetInstrInfoImpl { MipsTargetMachine &TM; const MipsRegisterInfo RI; public: - MipsInstrInfo(MipsTargetMachine &TM); + explicit MipsInstrInfo(MipsTargetMachine &TM); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h index e659129a2d4..d74399d4ad4 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h @@ -72,7 +72,7 @@ class PPCInstrInfo : public TargetInstrInfoImpl { const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const; public: - PPCInstrInfo(PPCTargetMachine &TM); + explicit PPCInstrInfo(PPCTargetMachine &TM); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.h b/llvm/lib/Target/Sparc/SparcInstrInfo.h index 22b2dcd5916..e9ce790a2a0 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.h +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.h @@ -35,7 +35,7 @@ class SparcInstrInfo : public TargetInstrInfoImpl { const SparcRegisterInfo RI; const SparcSubtarget& Subtarget; public: - SparcInstrInfo(SparcSubtarget &ST); + explicit SparcInstrInfo(SparcSubtarget &ST); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h index f4cdb706955..111eb8c1b55 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -243,7 +243,7 @@ class X86InstrInfo : public TargetInstrInfoImpl { DenseMap<unsigned*, std::pair<unsigned, unsigned> > MemOp2RegOpTable; public: - X86InstrInfo(X86TargetMachine &tm); + explicit X86InstrInfo(X86TargetMachine &tm); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should diff --git a/llvm/lib/Target/X86/X86JITInfo.h b/llvm/lib/Target/X86/X86JITInfo.h index 183e2f2bb81..69bebd0270c 100644 --- a/llvm/lib/Target/X86/X86JITInfo.h +++ b/llvm/lib/Target/X86/X86JITInfo.h @@ -23,7 +23,7 @@ namespace llvm { X86TargetMachine &TM; intptr_t PICBase; public: - X86JITInfo(X86TargetMachine &tm) : TM(tm) {useGOT = 0;} + explicit X86JITInfo(X86TargetMachine &tm) : TM(tm) {useGOT = 0;} /// replaceMachineCodeForFunction - Make it so that calling the function /// whose machine code is at OLD turns into a call to NEW, perhaps by diff --git a/llvm/lib/VMCore/Verifier.cpp b/llvm/lib/VMCore/Verifier.cpp index 68e5ab40381..4ac8c0f3a48 100644 --- a/llvm/lib/VMCore/Verifier.cpp +++ b/llvm/lib/VMCore/Verifier.cpp @@ -118,16 +118,16 @@ namespace { // Anonymous namespace for class : FunctionPass((intptr_t)&ID), Broken(false), RealPass(true), action(AbortProcessAction), DT(0), msgs( std::ios::app | std::ios::out ) {} - Verifier( VerifierFailureAction ctn ) + explicit Verifier(VerifierFailureAction ctn) : FunctionPass((intptr_t)&ID), Broken(false), RealPass(true), action(ctn), DT(0), msgs( std::ios::app | std::ios::out ) {} - Verifier(bool AB ) + explicit Verifier(bool AB) : FunctionPass((intptr_t)&ID), Broken(false), RealPass(true), action( AB ? AbortProcessAction : PrintMessageAction), DT(0), msgs( std::ios::app | std::ios::out ) {} - Verifier(DominatorTree &dt) + explicit Verifier(DominatorTree &dt) : FunctionPass((intptr_t)&ID), Broken(false), RealPass(false), action(PrintMessageAction), DT(&dt), msgs( std::ios::app | std::ios::out ) {} |