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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index ff0e609803d..d41054b15bb 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -2977,7 +2977,11 @@ SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT,
// Currently a SETCC or a AND/OR/XOR with two SETCCs are handled.
unsigned InMaskOpc = InMask->getOpcode();
+
+ // FIXME: This code seems to be too restrictive, we might consider
+ // generalizing it or dropping it.
assert((InMaskOpc == ISD::SETCC ||
+ ISD::isBuildVectorOfConstantSDNodes(InMask.getNode()) ||
(isLogicalMaskOp(InMaskOpc) &&
isSETCCorConvertedSETCC(InMask->getOperand(0)) &&
isSETCCorConvertedSETCC(InMask->getOperand(1)))) &&
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