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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0e9381dbc61..c5cc2cb6fcd 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -16801,9 +16801,9 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
// Try to match a min/max vector operation.
if (N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::SETCC) {
- unsigned Opc;
- bool NeedSplit;
- std::tie(Opc, NeedSplit) = matchIntegerMINMAX(Cond, VT, LHS, RHS, DAG, Subtarget);
+ std::pair<unsigned, bool> ret = matchIntegerMINMAX(Cond, VT, LHS, RHS, DAG, Subtarget);
+ unsigned Opc = ret.first;
+ bool NeedSplit = ret.second;
if (Opc && NeedSplit) {
unsigned NumElems = VT.getVectorNumElements();
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