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-rw-r--r--llvm/lib/Target/ARM/ARM.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index ff12b36a0ea..96b4742da2b 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -416,7 +416,7 @@ def : ProcessorModel<"cortex-r4f", CortexA8Model,
def : ProcessorModel<"cortex-r5", CortexA8Model,
[ProcR5, HasV7Ops, FeatureDB,
FeatureVFP3, FeatureDSPThumb2,
- FeatureHasRAS, FeatureVFPOnlySP,
+ FeatureHasRAS,
FeatureD16, FeatureRClass]>;
// FIXME: R7 has currently the same ProcessorModel as A8 and is modelled as R5.
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