diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.h | 2 |
4 files changed, 13 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index d211077b90d..8bbcd2651ca 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -202,7 +202,7 @@ namespace { Ptr.Val->use_size() > 1) { SDOperand BasePtr; SDOperand Offset; - ISD::MemOpAddrMode AM = ISD::UNINDEXED; + ISD::MemIndexedMode AM = ISD::UNINDEXED; if (TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) { // Try turning it into a pre-indexed load / store except when // 1) Another use of base ptr is a predecessor of N. If ptr is folded @@ -298,7 +298,7 @@ namespace { SDOperand BasePtr; SDOperand Offset; - ISD::MemOpAddrMode AM = ISD::UNINDEXED; + ISD::MemIndexedMode AM = ISD::UNINDEXED; if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM,DAG)) { if (Ptr == Offset) std::swap(BasePtr, Offset); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index f2e9ea8c83c..3b51679810e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1619,8 +1619,9 @@ SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT, return SDOperand(N, 0); } -SDOperand SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base, - SDOperand Offset, ISD::MemOpAddrMode AM){ +SDOperand +SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base, + SDOperand Offset, ISD::MemIndexedMode AM) { LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); assert(LD->getOffset().getOpcode() == ISD::UNDEF && "Load is already a indexed load!"); @@ -1722,8 +1723,9 @@ SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val, return SDOperand(N, 0); } -SDOperand SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base, - SDOperand Offset, ISD::MemOpAddrMode AM){ +SDOperand +SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base, + SDOperand Offset, ISD::MemIndexedMode AM) { StoreSDNode *ST = cast<StoreSDNode>(OrigStore); assert(ST->getOffset().getOpcode() == ISD::UNDEF && "Store is already a indexed store!"); @@ -2841,7 +2843,7 @@ const char *SDNode::getOperationName(const SelectionDAG *G) const { } } -const char *SDNode::getAddressingModeName(ISD::MemOpAddrMode AM) { +const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { switch (AM) { default: return ""; @@ -2943,7 +2945,7 @@ void SDNode::dump(const SelectionDAG *G) const { if (doExt) std::cerr << MVT::getValueTypeString(LD->getLoadedVT()) << ">"; - const char *AM = getAddressingModeName(LD->getAddressingMode()); + const char *AM = getIndexedModeName(LD->getAddressingMode()); if (AM != "") std::cerr << " " << AM; } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { @@ -2951,7 +2953,7 @@ void SDNode::dump(const SelectionDAG *G) const { std::cerr << " <trunc " << MVT::getValueTypeString(ST->getStoredVT()) << ">"; - const char *AM = getAddressingModeName(ST->getAddressingMode()); + const char *AM = getIndexedModeName(ST->getAddressingMode()); if (AM != "") std::cerr << " " << AM; } diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index bd04a806253..a850e473ddd 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -853,7 +853,7 @@ bool PPCTargetLowering::SelectAddressRegImmShift(SDOperand N, SDOperand &Disp, /// can be legally represented as pre-indexed load / store address. bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDOperand &Base, SDOperand &Offset, - ISD::MemOpAddrMode &AM, + ISD::MemIndexedMode &AM, SelectionDAG &DAG) { return false; diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index 87b938a0759..cb4dc473f13 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -182,7 +182,7 @@ namespace llvm { /// can be legally represented as pre-indexed load / store address. virtual bool getPreIndexedAddressParts(SDNode *N, SDOperand &Base, SDOperand &Offset, - ISD::MemOpAddrMode &AM, + ISD::MemIndexedMode &AM, SelectionDAG &DAG); /// SelectAddressRegReg - Given the specified addressed, check to see if it |
